src/openpower/test/test_state_class.py

   1 """ Test States
   2
   3 This module tests the functionality of the state class by manually
   4 loading various registers and memory with values to be compared
   5 between different states.
   6
   7 related bugs:
   8     * https://bugs.libre-soc.org/show_bug.cgi?id=686
   9
  10 """
  11
  12 import unittest
  13 import random
  14 from openpower.test.state import SimState, state_factory
  15
  16
  17 class TestStates(unittest.TestCase):
  18     def test_basic_regs(self):
  19         initial_regs = [0] * 32
  20         for i in range(32):
  21             initial_regs[i] = random.randint(0, (1 << 64) - 1)
  22         sim = self.empty_state('sim')
  23         sim.intregs = initial_regs
  24         hdl = self.empty_state('hdl')
  25         hdl.intregs = initial_regs
  26         sim.compare(hdl)
  27         sim = self.empty_state('sim')
  28         sim.intregs = initial_regs
  29         hdl = self.empty_state('hdl')
  30         hdl.intregs = initial_regs
  31         hdl.compare(sim)
  32
  33     @unittest.expectedFailure
  34     def test_basic_regs_fail(self):
  35         initial_regs = [0] * 32
  36         for i in range(32):
  37             initial_regs[i] = random.randint(0, (1 << 64) - 1)
  38             fail_regs[i] = random.randint(0, (1 << 64) - 1)
  39         sim = self.empty_state('sim')
  40         sim.intregs = initial_regs
  41         hdl = self.empty_state('hdl')
  42         hdl.intregs = fail_regs
  43         sim.compare(hdl)
  44         sim = self.empty_state('sim')
  45         sim.intregs = initial_regs
  46         hdl = self.empty_state('hdl')
  47         hdl.intregs = fail_regs
  48         hdl.compare(sim)
  49
  50     def test_basic_mem(self):
  51         initial_mem = {}
  52         for i in range(32):
  53             initial_mem[i*8] = random.randint(0, (1 << 64) - 1)
  54         sim = self.empty_state('sim')
  55         sim.mem = initial_mem
  56         hdl = self.empty_state('hdl')
  57         hdl.mem = initial_mem
  58         sim.compare_mem(hdl)
  59         hdl.compare_mem(sim)
  60
  61     def test_basic_mem_size_0_diff(self):
  62         sim_mem = {0: 8, 16: 24, 240: 32}
  63         hdl_mem = {0: 8, 16: 24, 224: 0, 232: 0, 240: 32}
  64         sim = self.empty_state('sim')
  65         sim.mem = sim_mem
  66         hdl = self.empty_state('hdl')
  67         hdl.mem = hdl_mem
  68         sim.compare_mem(hdl)
  69         hdl.compare_mem(sim)
  70
  71     @unittest.expectedFailure
  72     def test_basic_mem_size_fail(self):
  73         initial_mem = {}
  74         for i in range(32):
  75             initial_mem[i] = random.randint(0, (1 << 64) - 1)
  76         sim = self.empty_state('sim')
  77         sim.mem = initial_mem
  78         hdl = self.empty_state('hdl')
  79         for i in range(16):
  80             hdl.mem[i] = initial_mem[i]
  81         sim.compare_mem(hdl)
  82         hdl.compare_mem(sim)
  83
  84     @unittest.expectedFailure
  85     def test_basic_mem_off_by_one(self):
  86         sim_mem = {0: 8, 16: 24, 24: 0}
  87         hdl_mem = {0: 8, 8: 24, 24: 0}
  88         sim = self.empty_state('sim')
  89         sim.mem = sim_mem
  90         hdl = self.empty_state('hdl')
  91         hdl.mem = hdl_mem
  92         sim.compare_mem(hdl)
  93         hdl.compare_mem(sim)
  94
  95     @unittest.expectedFailure
  96     def test_basic_mem_one_word_fail(self):
  97         sim_mem = {0: 8}
  98         hdl_mem = {0: 16}
  99         sim = self.empty_state('sim')
 100         sim.mem = sim_mem
 101         hdl = self.empty_state('hdl')
 102         hdl.mem = hdl_mem
 103         sim.compare_mem(hdl)
 104         hdl.compare_mem(sim)
 105
 106     @unittest.expectedFailure
 107     def test_basic_no_mem_fail(self):
 108         hdl_mem = {16: 32}
 109         sim = self.empty_state('sim')
 110         hdl = self.empty_state('hdl')
 111         hdl.mem = hdl_mem
 112         sim.compare_mem(hdl)
 113         hdl.compare_mem(sim)
 114
 115     def empty_state(self, state_type):
 116         state_class = state_factory[state_type]
 117         state = state_class(None)
 118         state.intregs = []
 119         state.crregs = []
 120         state.pc = []
 121         state.so, state.sv, state.ov, state.ca = 0, 0, 0, 0
 122         state.mem = {}
 123         state.code = 0
 124         state.dut = self
 125         state.state_type = state_type
 126         return state
 127
 128
 129 if __name__ == '__main__':
 130     unittest.main()