src/openpower/test/trap/trap_cases.py

   1 from openpower.simulator.program import Program
   2 from openpower.endian import bigendian
   3 from openpower.consts import MSR
   4 from openpower.test.state import ExpectedState
   5
   6 from openpower.test.common import TestAccumulatorBase
   7 import random
   8
   9
  10 class TrapTestCase(TestAccumulatorBase):
  11
  12     def case_1_kaivb(self):
  13         # https://bugs.libre-soc.org/show_bug.cgi?id=859
  14         lst = ["mtspr 850, 1",  # KAIVB
  15                "mfspr 2, 850",
  16                ]
  17         initial_regs = [0] * 32
  18         initial_regs[1] = 0x129518230011feed
  19         initial_sprs = {'KAIVB': 0x12345678,
  20                         }
  21         msr = 0xa000000000000003
  22         self.add_case(Program(lst, bigendian),
  23                       initial_regs, initial_sprs,
  24                                     initial_msr=msr)
  25
  26     def case_2_kaivb_test(self):
  27         # https://bugs.libre-soc.org/show_bug.cgi?id=859
  28         # sets KAIVB to 1<<13 then deliberately causes exception.
  29         # PC expected to jump to (1<<13)|0x700 *NOT* 0x700 as usual
  30         lst = ["mtspr 850, 1",  # KAIVB
  31                "tbegin.",       # deliberately use illegal instruction
  32                ]
  33         initial_regs = [0] * 32
  34         initial_regs[1] = 1<<13
  35         initial_sprs = {'KAIVB': 0x12345678,
  36                         }
  37         msr = 0xa000000000000003
  38         e = ExpectedState(pc=0x2700)
  39         e.intregs[1] = 1<<13
  40         e.msr = 0xa000000000000003 # TODO, not actually checked
  41         self.add_case(Program(lst, bigendian),
  42                       initial_regs, initial_sprs,
  43                                     initial_msr=msr,
  44                                     expected=e)
  45
  46     def case_0_hrfid(self):
  47         lst = ["hrfid"]
  48         initial_regs = [0] * 32
  49         initial_regs[1] = 1
  50         initial_sprs = {'HSRR0': 0x12345678, 'HSRR1': 0x5678}
  51         self.add_case(Program(lst, bigendian),
  52                       initial_regs, initial_sprs)
  53
  54     def case_1_sc(self):
  55         lst = ["sc 0"]
  56         initial_regs = [0] * 32
  57         initial_regs[1] = 1
  58         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
  59         e = ExpectedState(pc=0xc00)
  60         e.intregs[1] = 1
  61         self.add_case(Program(lst, bigendian),
  62                       initial_regs, initial_sprs)
  63
  64     def case_1_rfid(self):
  65         lst = ["rfid"]
  66         initial_regs = [0] * 32
  67         initial_regs[1] = 1
  68         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
  69         self.add_case(Program(lst, bigendian),
  70                       initial_regs, initial_sprs)
  71
  72     def case_2_rfid(self):
  73         lst = ["rfid"]
  74         initial_regs = [0] * 32
  75         initial_regs[1] = 1
  76         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0xb000000000001033}
  77         e = ExpectedState(pc=0x700)
  78         e.intregs[1] = 1
  79         e.msr = 0xb000000000001033 # TODO, not actually checked
  80         self.add_case(Program(lst, bigendian),
  81                       initial_regs, initial_sprs,
  82                                     initial_msr=0xa000000000000003,
  83                                     expected=e)
  84
  85     def case_0_trap_eq_imm(self):
  86         insns = ["twi", "tdi"]
  87         for i in range(2):
  88             choice = random.choice(insns)
  89             lst = [f"{choice} 4, 1, %d" % i]  # TO=4: trap equal
  90             initial_regs = [0] * 32
  91             initial_regs[1] = 1
  92             self.add_case(Program(lst, bigendian), initial_regs)
  93
  94     def case_0_trap_eq(self):
  95         insns = ["tw", "td"]
  96         for i in range(2):
  97             choice = insns[i]
  98             lst = [f"{choice} 4, 1, 2"]  # TO=4: trap equal
  99             initial_regs = [0] * 32
 100             initial_regs[1] = 1
 101             initial_regs[2] = 1
 102             self.add_case(Program(lst, bigendian), initial_regs)
 103
 104     def case_3_mtmsr_0(self):
 105         lst = ["mtmsr 1,0"]
 106         initial_regs = [0] * 32
 107         initial_regs[1] = 0xffffffffffffffff
 108         self.add_case(Program(lst, bigendian), initial_regs)
 109
 110     def case_3_mtmsr_1(self):
 111         lst = ["mtmsr 1,1"]
 112         initial_regs = [0] * 32
 113         initial_regs[1] = 0xffffffffffffffff
 114         self.add_case(Program(lst, bigendian), initial_regs)
 115
 116     def case_4_mtmsrd_0_linux(self):
 117         lst = ["mtmsrd 1,0"]
 118         initial_regs = [0] * 32
 119         initial_regs[1] = 0xb000000000001033
 120         self.add_case(Program(lst, bigendian), initial_regs,
 121                                     initial_msr=0xa000000000000003)
 122
 123     def case_4_mtmsrd_0(self):
 124         lst = ["mtmsrd 1,0"]
 125         initial_regs = [0] * 32
 126         initial_regs[1] = 0xffffffffffffffff
 127         self.add_case(Program(lst, bigendian), initial_regs)
 128
 129     def case_5_mtmsrd_1(self):
 130         lst = ["mtmsrd 1,1"]
 131         initial_regs = [0] * 32
 132         initial_regs[1] = 0xffffffffffffffff
 133         self.add_case(Program(lst, bigendian), initial_regs)
 134
 135     def case_6_mtmsr_priv_0(self):
 136         lst = ["mtmsr 1,0"]
 137         initial_regs = [0] * 32
 138         initial_regs[1] = 0xffffffffffffffff
 139         msr = 1 << MSR.PR  # set in "problem state"
 140         self.add_case(Program(lst, bigendian), initial_regs,
 141                       initial_msr=msr)
 142
 143     def case_7_rfid_priv_0(self):
 144         lst = ["rfid"]
 145         initial_regs = [0] * 32
 146         initial_regs[1] = 1
 147         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
 148         msr = 1 << MSR.PR  # set in "problem state"
 149         self.add_case(Program(lst, bigendian),
 150                       initial_regs, initial_sprs,
 151                       initial_msr=msr)
 152
 153     def case_8_mfmsr(self):
 154         lst = ["mfmsr 1"]
 155         initial_regs = [0] * 32
 156         msr = (~(1 << MSR.PR)) & 0xffffffffffffffff
 157         self.add_case(Program(lst, bigendian), initial_regs,
 158                       initial_msr=msr)
 159
 160     def case_9_mfmsr_priv(self):
 161         lst = ["mfmsr 1"]
 162         initial_regs = [0] * 32
 163         msr = 1 << MSR.PR  # set in "problem state"
 164         self.add_case(Program(lst, bigendian), initial_regs,
 165                       initial_msr=msr)
 166
 167     def case_999_illegal(self):
 168         # ok, um this is a bit of a cheat: use an instruction we know
 169         # is not implemented by either ISACaller or the core
 170         lst = ["tbegin.",
 171                "mtmsr 1,1"]  # should not get executed
 172         initial_regs = [0] * 32
 173         self.add_case(Program(lst, bigendian), initial_regs)
 174