add fsubs unit test
[openpower-isa.git] / src / openpower / util.py
1 import os
2 import random
3 from openpower.consts import FastRegsEnum
4 from openpower.decoder.power_enums import SPRfull as SPR, spr_dict
5
6
7 # note that we can get away with using SPRfull here because the values
8 # (numerical values) are what is used for lookup.
9 spr_to_fast = { SPR.CTR: FastRegsEnum.CTR,
10 SPR.LR: FastRegsEnum.LR,
11 SPR.TAR: FastRegsEnum.TAR,
12 SPR.SRR0: FastRegsEnum.SRR0,
13 SPR.SRR1: FastRegsEnum.SRR1,
14 SPR.XER: FastRegsEnum.XER,
15 SPR.DEC: FastRegsEnum.DEC,
16 SPR.TB: FastRegsEnum.TB,
17 SPR.SVSRR0: FastRegsEnum.SVSRR0,
18 }
19
20 sprstr_to_fast = {}
21 fast_to_spr = {}
22 for (k, v) in spr_to_fast.items():
23 sprstr_to_fast[k.name] = v
24 fast_to_spr[v] = k
25
26 def fast_reg_to_spr(spr_num):
27 return fast_to_spr[spr_num].value
28
29
30 def spr_to_fast_reg(spr_num):
31 if not isinstance(spr_num, str):
32 spr_num = spr_dict[spr_num].SPR
33 return sprstr_to_fast.get(spr_num, None)
34
35
36 def slow_reg_to_spr(slow_reg):
37 for i, x in enumerate(SPR):
38 if slow_reg == i:
39 return x.value
40
41
42 def spr_to_slow_reg(spr_num):
43 for i, x in enumerate(SPR):
44 if spr_num == x.value:
45 return i
46
47
48 # TODO: make this a util routine (somewhere)
49 def mask_extend(x, nbits, repeat):
50 res = 0
51 extended = (1<<repeat)-1
52 for i in range(nbits):
53 if x & (1<<i):
54 res |= extended << (i*repeat)
55 return res
56
57
58 # makes a logarithmically-skewed random number
59 def log_rand(n, min_val=1):
60 logrange = random.randint(1, n)
61 return random.randint(min_val, (1 << logrange)-1)
62
63
64 def log(*args, **kwargs):
65 """verbose printing, disabled if an ENV VAR "SILENCELOG" exists.
66 """
67 if 'SILENCELOG' in os.environ:
68 return
69 print(*args, **kwargs)
70