3 from copy
import deepcopy
5 def pins(fname
, pingroup
, bankspec
, suffix
, offs
, bank
, mux
,
6 spec
=None, limit
=None, origsuffix
=None):
10 for name
in pingroup
[:limit
]:
12 name_
= "%s_%s" % (name
, suffix
)
15 if spec
and spec
.has_key(name
):
17 pin
= {mux
: (name_
, bank
)}
18 offs_bank
, offs_
= offs
21 idx_
+= bankspec
[bank
]
26 name_
= "%s_%s" % (name
, suffix
)
31 if not spec
.has_key(name
):
33 idx_
, mux_
, bank_
= spec
[name
]
35 #idx_ += bankspec[bank_]
36 pin
= {mux_
: (name_
, bank_
)}
41 return fname
, origsuffix
, bank
, res
43 def i2s(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None, limit
=None):
44 i2spins
= ['IISMCK', 'IISBCK', 'IISLRCK', 'IISDI']
46 i2spins
.append("IISDO%d" % i
)
47 return pins('IIS', i2spins
, bankspec
, suffix
, offs
, bank
, mux
, spec
, limit
,
50 def emmc(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
51 emmcpins
= ['MMCCMD', 'MMCCLK']
53 emmcpins
.append("MMCD%d" % i
)
54 return pins('MMC', emmcpins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
57 def sdmmc(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None,
58 start
=None, limit
=None):
59 sdmmcpins
= ['CMD', 'CLK']
61 sdmmcpins
.append("D%d" % i
)
62 sdmmcpins
= sdmmcpins
[start
:limit
]
63 sdmmcpins
= namesuffix('SD', suffix
, sdmmcpins
)
64 return pins('SD', sdmmcpins
, bankspec
, '', offs
, bank
, mux
, spec
,
67 def spi(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
68 spipins
= namesuffix('SPI', suffix
,
69 ['CLK', 'NSS', 'MOSI', 'MISO', 'NSS'])
70 return pins('SPI', spipins
, bankspec
, '', offs
, bank
, mux
, spec
,
73 def quadspi(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None, limit
=None):
74 spipins
= namesuffix('QSPI', suffix
,
75 ['CK', 'NSS', 'IO0', 'IO1', 'IO2', 'IO3'])
76 return pins('QSPI', spipins
, bankspec
, '', offs
, bank
, mux
, spec
, limit
,
79 def i2c(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
80 spipins
= namesuffix('TWI', suffix
,
82 return pins('TWI', spipins
, bankspec
, '', offs
, bank
, mux
, spec
,
85 def jtag(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
86 uartpins
= namesuffix('JTAG', suffix
, ['MS', 'DI', 'DO', 'CK'])
87 return pins('JTAG', uartpins
, bankspec
, '', offs
, bank
, mux
, spec
,
90 def uart(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
91 uartpins
= namesuffix('UART', suffix
, ['TX', 'RX'])
92 return pins('UART', uartpins
, bankspec
, '', offs
, bank
, mux
, spec
,
95 def namesuffix(name
, suffix
, namelist
):
98 names
.append("%s%s_%s" % (name
, suffix
, n
))
101 def ulpi(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
102 ulpipins
= namesuffix('ULPI', suffix
, ['CK', 'DIR', 'STP', 'NXT'])
104 ulpipins
.append('ULPI%s_D%d' % (suffix
, i
))
105 return pins('ULPI', ulpipins
, bankspec
, "", offs
, bank
, mux
, spec
,
108 def uartfull(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
109 uartpins
= namesuffix('UART', suffix
, ['TX', 'RX', 'CTS', 'RTS'])
110 return pins('UART', uartpins
, bankspec
, '', offs
, bank
, mux
, spec
,
113 def rgbttl(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
114 ttlpins
= ['LCDCK', 'LCDDE', 'LCDHS', 'LCDVS']
116 ttlpins
.append("LCD%d" % i
)
117 return pins('LCD', ttlpins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
120 def rgmii(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
123 buspins
.append("RG_ERXD%d" % i
)
125 buspins
.append("RG_ETXD%d" % i
)
127 buspins
.append("RG_FB_CS%d" % i
)
128 buspins
+= ['RG_ERXCK', 'RG_ERXERR', 'RG_ERXDV',
129 'RG_EMDC', 'RG_EMDIO',
130 'RG_ETXEN', 'RG_ETXCK', 'RG_ECRS',
131 'RG_ECOL', 'RG_ETXERR']
132 return pins('RG', buspins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
135 def flexbus1(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None, limit
=None):
138 buspins
.append("AD%d" % i
)
140 buspins
.append("CS%d" % i
)
141 buspins
+= ['ALE', 'OE', 'RW', 'TA', 'CLK',
142 'A0', 'A1', 'TS', 'TBST',
145 buspins
.append("BWE%d" % i
)
147 buspins
.append("CS%d" % i
)
148 buspins
= namesuffix('FB', suffix
, buspins
)
149 return pins('FB', buspins
, bankspec
, "", offs
, bank
, mux
, spec
, limit
,
152 def flexbus2(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None, limit
=None):
154 for i
in range(8,32):
155 buspins
.append("AD%d" % i
)
156 buspins
= namesuffix('FB', suffix
, buspins
)
157 return pins('FB', buspins
, bankspec
, '', offs
, bank
, mux
, spec
, limit
,
160 def sdram1(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
163 buspins
.append("SDRDQM%d" % i
)
165 buspins
.append("SDRAD%d" % i
)
167 buspins
.append("SDRDQ%d" % i
)
169 buspins
.append("SDRCS%d#" % i
)
171 buspins
.append("SDRDQ%d" % i
)
173 buspins
.append("SDRBA%d" % i
)
174 buspins
+= ['SDRCKE', 'SDRRAS#', 'SDRCAS#', 'SDRWE#',
176 return pins('SDR', buspins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
179 def sdram2(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None, limit
=None):
182 buspins
.append("SDRCS%d#" % i
)
183 for i
in range(8,32):
184 buspins
.append("SDRDQ%d" % i
)
185 return pins('SDR', buspins
, bankspec
, suffix
, offs
, bank
, mux
, spec
, limit
,
188 def mcu8080(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
191 buspins
.append("MCUD%d" % i
)
193 buspins
.append("MCUAD%d" % (i
+8))
195 buspins
.append("MCUCS%d" % i
)
197 buspins
.append("MCUNRB%d" % i
)
198 buspins
+= ['MCUCD', 'MCURD', 'MCUWR', 'MCUCLE', 'MCUALE',
200 return pins('MCU', buspins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
203 def _pinbank(bankspec
, prefix
, suffix
, offs
, bank
, gpiooffs
, gpionum
=1, mux
=1,
206 for i
in range(gpiooffs
, gpiooffs
+gpionum
):
207 gpiopins
.append("%s%s%d" % (prefix
, bank
, i
))
208 return pins('GPIO', gpiopins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
211 def eint(bankspec
, suffix
, offs
, bank
, gpiooffs
, gpionum
=1, mux
=1, spec
=None):
213 for i
in range(gpiooffs
, gpiooffs
+gpionum
):
214 gpiopins
.append("EINT%d" % (i
))
215 return pins('EINT', gpiopins
, bankspec
, suffix
, offs
, bank
, mux
, spec
,
218 def pwm(bankspec
, suffix
, offs
, bank
, mux
=1, spec
=None):
219 return pins('PWM', ['PWM', ], bankspec
, suffix
, offs
, bank
, mux
, spec
,
222 def gpio(bankspec
, suffix
, offs
, bank
, gpiooffs
, gpionum
=1, mux
=1, spec
=None):
223 return _pinbank(bankspec
, "GPIO", suffix
, offs
, bank
, gpiooffs
,
224 gpionum
, mux
=0, spec
=None)
227 print "| Pin | Mux0 | Mux1 | Mux2 | Mux3 |"
228 print "| --- | ----------- | ----------- | ----------- | ----------- |"
233 res
= '| %3d |' % pin
235 if not pdata
.has_key(mux
):
238 name
, bank
= pdata
[mux
]
239 res
+= " %s %-9s |" % (bank
, name
)
245 if not f
.startswith('FB_'):
249 return f2
[0], int(f2
[1])
252 while f
and not f
[0].isdigit():
255 return a
, int(f
) if f
else None
265 def find_fn(fname
, names
):
267 if fname
.startswith(n
):
270 def display_fns(bankspec
, pins
, function_names
):
271 fn_names
= function_names
.keys()
273 for (pin
, pdata
) in pins
.items():
274 for mux
in range(1,4): # skip GPIO for now
275 if not pdata
.has_key(mux
):
277 name
, bank
= pdata
[mux
]
278 if not fns
.has_key(name
):
280 fns
[name
].append((pin
-bankspec
[bank
], mux
, bank
))
286 fnbase
= find_fn(fname
, fn_names
)
288 if fnbase
!= current_fn
:
289 if current_fn
is not None:
291 print "## %s" % fnbase
293 print function_names
[fnbase
]
296 print "* %-9s :" % fname
,
297 for (pin
, mux
, bank
) in fns
[fname
]:
298 print "%s%d/%d" % (bank
, pin
, mux
),
303 def check_functions(title
, bankspec
, fns
, pins
, required
, eint
, pwm
,
306 pins
= deepcopy(pins
)
307 if descriptions
is None:
310 print "# Pinmap for %s" % title
314 for name
in required
:
317 if descriptions
and descriptions
.has_key(name
):
318 print descriptions
[name
]
321 name
= name
.split(':')
323 findbank
= name
[0][0]
324 findmux
= int(name
[0][1:])
330 name
= name
.split('/')
341 if not fname
.startswith(name
):
343 for pin
, mux
, bank
in fns
[fname
]:
344 if findbank
is not None:
349 pin_
= pin
+ bankspec
[bank
]
350 if pins
.has_key(pin_
):
351 pinfound
[pin_
] = (fname
, pin_
, bank
, pin
, mux
)
353 pinidx
= pinfound
.keys()
357 fname
, pin_
, bank
, pin
, mux
= pinfound
[pin_
]
361 if len(found
) > count
:
364 print "* %s %d %s%d/%d" % (fname
, pin_
, bank
, pin
, mux
)
370 for name
in descriptions
.keys():
371 if not name
.startswith('GPIO'):
386 if descriptions
and descriptions
.has_key(fname
):
387 desc
= ': %s' % descriptions
[fname
]
390 pin_
= pin
+ bankspec
[bank
]
391 if not pins
.has_key(pin_
):
395 print "* %-8s %d %s%-2d %s" % (fname
, pin_
, bank
, pin
, desc
)
399 display_group(bankspec
, "EINT", eint
, fns
, pins
, descriptions
)
401 display_group(bankspec
, "PWM", pwm
, fns
, pins
, descriptions
)
403 print "## Unused Pinouts (spare as GPIO) for '%s'" % title
405 if descriptions
and descriptions
.has_key('GPIO'):
406 print descriptions
['GPIO']
413 def display_group(bankspec
, title
, todisplay
, fns
, pins
, descriptions
):
414 print "## %s" % title
418 for fname
in todisplay
:
420 if descriptions
and descriptions
.has_key(fname
):
421 desc
= ': %s' % descriptions
[fname
]
422 fname
= fname
.split(':')
424 findbank
= fname
[0][0]
425 findmux
= int(fname
[0][1:])
431 for (pin
, mux
, bank
) in fns
[fname
]:
432 if findbank
is not None:
439 pin_
= pin
+ bankspec
[bank
]
440 if not pins
.has_key(pin_
):
444 print "* %s %d %s%d/%d %s" % (fname
, pin_
, bank
, pin
, mux
, desc
)
447 def pinmerge(pins
, fn
):
448 # hack, store the function specs in the pins dict
449 fname
, suffix
, bank
, fn
= fn
450 if not hasattr(pins
, 'fnspec'):
454 if not pins
.fnspec
.has_key(fname
):
455 pins
.fnspec
[fname
] = {}
456 print fname
, bank
, suffix
457 if suffix
or fname
== 'EINT' or fname
== 'PWM':
458 specname
= fname
+ suffix
460 specname
= fname
+ bank
461 pins
.fnspec
[fname
][specname
] = fn
464 for (pinidx
, v
) in fn
.items():
465 if not pins
.has_key(pinidx
):
468 pins
[pinidx
].update(v
)
470 def display_fixed(fixed
, offs
):
475 for pin
, k
in enumerate(fkeys
):
480 for name
in fixed
[k
]:
484 if prevname
[:2] == name
[:2] and linecount
!= 0:
490 print "* %d: %d %s" % (pin_
, pin
, name
),