src/spec/pinfunctions.py

   1 #!/usr/bin/env python
   2
   3 """ define functions here, with their pin names and the pin type.
   4
   5     each function returns a pair of lists
   6     (or objects with a __getitem__ function)
   7
   8     the first list (or object) contains pin name plus type specifications.
   9
  10     the type is:
  11
  12     * "-" for an input pin,
  13     * "+" for an output pin,
  14     * "*" for an in/out pin
  15
  16     each function is then added to the pinspec tuple, below, as a ("NAME",
  17     function) entry.
  18
  19     different functions may be added multiple times under the same NAME,
  20     so that complex (or large) functions can be split into one or more
  21     groups (and placed on different pinbanks).
  22
  23     eint, pwm and gpio are slightly odd in that instead of a fixed list
  24     an object is returned with a __getitem__ function that accepts a
  25     slice object.  in this way the actual generation of the pin name
  26     is delayed until it is known precisely how many pins are to be
  27     generated, and that's not known immediately (or it would be if
  28     every single one of the functions below had a start and end parameter
  29     added).  see spec.interfaces.PinGen class slice on pingroup
  30
  31     the second list is the names of pins that are part of an inout bus.
  32     this list of pins (a ganged group) will need to be changed under
  33     the control of the function, as a group.  for example: sdmmc's
  34     D0-D3 pins are in-out, they all change from input to output at
  35     the same time under the control of the function, therefore there's
  36     no point having multiple in-out switch/control wires, as the
  37     sdmmc is never going to do anything other than switch this entire
  38     bank all at once.  so in this particular example, sdmmc returns:
  39
  40     (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
  41      ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
  42 """
  43
  44
  45 def i2s(suffix, bank):
  46     return (['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'],
  47             [])
  48
  49
  50 # XXX TODO: correct these.  this is a stub for now
  51 def lpc(suffix, bank, pincount=8):
  52     emmcpins = ['CMD+', 'CLK+']
  53     inout = []
  54     for i in range(pincount):
  55         pname = "D%d*" % i
  56         emmcpins.append(pname)
  57         inout.append(pname)
  58     return (emmcpins, inout)
  59
  60
  61 def emmc(suffix, bank, pincount=8):
  62     emmcpins = ['CMD+', 'CLK+']
  63     inout = []
  64     for i in range(pincount):
  65         pname = "D%d*" % i
  66         emmcpins.append(pname)
  67         inout.append(pname)
  68     return (emmcpins, inout)
  69
  70
  71 def sdmmc(suffix, bank):
  72     return emmc(suffix, bank, pincount=4)
  73
  74
  75 def nspi(suffix, bank, iosize, masteronly=True):
  76     if masteronly:
  77         qpins = ['CK+', 'NSS+']
  78     else:
  79         qpins = ['CK*', 'NSS*']
  80     inout = []
  81     for i in range(iosize):
  82         pname = "IO%d*" % i
  83         qpins.append(pname)
  84         inout.append(pname)
  85     return (qpins, inout)
  86
  87
  88 def mspi(suffix, bank):
  89     return nspi(suffix, bank, 2, masteronly=True)
  90
  91
  92 def mquadspi(suffix, bank):
  93     return nspi(suffix, bank, 4, masteronly=True)
  94
  95
  96 def spi(suffix, bank):
  97     return nspi(suffix, bank, 2)
  98
  99
 100 def quadspi(suffix, bank):
 101     return nspi(suffix, bank, 4)
 102
 103
 104 def i2c(suffix, bank):
 105     return (['SDA*', 'SCL*'], [])
 106
 107
 108 def jtag(suffix, bank):
 109     return (['TMS-', 'TDI-', 'TDO+', 'TCK+'], [])
 110
 111
 112 def uart(suffix, bank):
 113     return (['TX+', 'RX-'], [])
 114
 115
 116 def ulpi(suffix, bank):
 117     ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
 118     for i in range(8):
 119         ulpipins.append('D%d*' % i)
 120     return (ulpipins, [])
 121
 122
 123 def uartfull(suffix, bank):
 124     return (['TX+', 'RX-', 'CTS-', 'RTS+'],
 125             [])
 126
 127
 128 def rgbttl(suffix, bank):
 129     ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
 130     for i in range(24):
 131         ttlpins.append("OUT%d+" % i)
 132     return (ttlpins, [])
 133
 134
 135 def rgmii(suffix, bank):
 136     buspins = []
 137     for i in range(4):
 138         buspins.append("ERXD%d-" % i)
 139     for i in range(4):
 140         buspins.append("ETXD%d+" % i)
 141     buspins += ['ERXCK-', 'ERXERR-', 'ERXDV-',
 142                 'EMDC+', 'EMDIO*',
 143                 'ETXEN+', 'ETXCK+', 'ECRS-',
 144                 'ECOL+', 'ETXERR+']
 145     return (buspins, [])
 146
 147
 148 def flexbus1(suffix, bank):
 149     buspins = []
 150     inout = []
 151     for i in range(8):
 152         pname = "AD%d*" % i
 153         buspins.append(pname)
 154         inout.append(pname)
 155     for i in range(2):
 156         buspins.append("CS%d+" % i)
 157     buspins += ['ALE+', 'OE+', 'RW+', 'TA-',
 158                 # 'TS+',  commented out for now, mirrors ALE, for mux'd mode
 159                 'TBST+',
 160                 'TSIZ0+', 'TSIZ1+']
 161     for i in range(4):
 162         buspins.append("BWE%d+" % i)
 163     for i in range(2, 6):
 164         buspins.append("CS%d+" % i)
 165     return (buspins, inout)
 166
 167
 168 def flexbus2(suffix, bank):
 169     buspins = []
 170     for i in range(8, 32):
 171         buspins.append("AD%d*" % i)
 172     return (buspins, buspins)
 173
 174
 175 def sdram1(suffix, bank):
 176     buspins = []
 177     inout = []
 178     for i in range(8):
 179         pname = "SDRDQM%d+" % i
 180         buspins.append(pname)
 181     for i in range(8):
 182         pname = "SDRD%d*" % i
 183         buspins.append(pname)
 184         inout.append(pname)
 185     for i in range(12):
 186         buspins.append("SDRAD%d+" % i)
 187     for i in range(2):
 188         buspins.append("SDRBA%d+" % i)
 189     buspins += ['SDRCLK+', 'SDRCKE+', 'SDRRASn+', 'SDRCASn+', 'SDRWEn+',
 190                 'SDRCSn0+']
 191     return (buspins, inout)
 192
 193
 194 def sdram2(suffix, bank):
 195     buspins = []
 196     inout = []
 197     for i in range(1, 6):
 198         buspins.append("SDRCSn%d+" % i)
 199     for i in range(8, 16):
 200         pname = "SDRDQM%d*" % i
 201         buspins.append(pname)
 202     for i in range(8, 16):
 203         pname = "SDRD%d*" % i
 204         buspins.append(pname)
 205         inout.append(pname)
 206     return (buspins, inout)
 207
 208
 209 def sdram3(suffix, bank):
 210     buspins = []
 211     inout = []
 212     for i in range(12, 13):
 213         buspins.append("SDRAD%d+" % i)
 214     for i in range(8, 64):
 215         pname = "SDRD%d*" % i
 216         buspins.append(pname)
 217         inout.append(pname)
 218     return (buspins, inout)
 219
 220
 221 def mcu8080(suffix, bank):
 222     buspins = []
 223     inout = []
 224     for i in range(8):
 225         pname = "MCUD%d*" % i
 226         buspins.append(pname)
 227         inout.append(pname)
 228     for i in range(8):
 229         buspins.append("MCUAD%d+" % (i + 8))
 230     for i in range(6):
 231         buspins.append("MCUCS%d+" % i)
 232     for i in range(2):
 233         buspins.append("MCUNRB%d+" % i)
 234     buspins += ['MCUCD+', 'MCURD+', 'MCUWR+', 'MCUCLE+', 'MCUALE+',
 235                 'MCURST+']
 236     return (buspins, inout)
 237
 238
 239 class RangePin(object):
 240     def __init__(self, suffix, prefix=None):
 241         self.suffix = suffix
 242         self.prefix = prefix or ''
 243
 244     def __getitem__(self, s):
 245         res = []
 246         for idx in range(s.start or 0, s.stop or -1, s.step or 1):
 247             res.append("%s%d%s" % (self.prefix, idx, self.suffix))
 248         return res
 249
 250
 251 def eint(suffix, bank):
 252     return (RangePin("-"), [])
 253
 254
 255 def pwm(suffix, bank):
 256     return (RangePin("+"), [])
 257
 258
 259 def gpio(suffix, bank):
 260     return (("GPIO%s" % bank, RangePin(prefix=bank, suffix="*")), [])
 261
 262
 263 # list functions by name here
 264
 265 pinspec = (('IIS', i2s),
 266            ('LPC', lpc),
 267            ('EMMC', emmc),
 268            ('MMC', sdmmc),
 269            ('MSPI', mspi),
 270            ('MQSPI', mquadspi),
 271            ('SPI', spi),
 272            ('QSPI', quadspi),
 273            ('TWI', i2c),
 274            ('JTAG', jtag),
 275            ('UART', uart),
 276            ('QUART', uartfull),
 277            ('LCD', rgbttl),
 278            ('ULPI', ulpi),
 279            ('RG', rgmii),
 280            ('FB', flexbus1),
 281            ('FB', flexbus2),
 282            ('SDR', sdram1),
 283            ('SDR', sdram2),
 284            ('SDR', sdram3),
 285            ('EINT', eint),
 286            ('PWM', pwm),
 287            ('GPIO', gpio),
 288            )