src/test_bsv/pinmux.bsv

   1
   2 /*
   3    This BSV file has been generated by the PinMux tool available at:
   4    https://bitbucket.org/casl/pinmux.
   5
   6    Authors: Neel Gala, Luke
   7    Date of generation: Sun Jun 24 12:09:36 2018
   8 */
   9
  10 package pinmux;
  11
  12    // FunctionType: contains the active wires of a function.  That INCLUDES
  13    // GPIO (as GPIO is also a "Function").  These are what get muxed.
  14    // However, only GPIO "Functions" will end up with Register SRAMs.
  15    typedef struct{
  16       Bit#(1) outputval;      // output from function to pad            bit2
  17       Bit#(1) inputval;       // input  from pad to function            bit1
  18       Bit#(1) output_en;      // output enable from core to pad         bit0
  19    } FunctionType deriving(Eq,Bits,FShow);
  20
  21    typedef struct{
  22       Bit#(1) outputval;      // output from core to pad                bit7
  23       Bit#(1) output_en;      // output enable from core to pad         bit6
  24       Bit#(1) input_en;       // input enable from core to io_cell      bit5
  25    } GenericIOType deriving(Eq,Bits,FShow);
  26
  27    interface MuxSelectionLines;
  28
  29       // declare the method which will capture the user pin-mux
  30       // selection values.The width of the input is dependent on the number
  31       // of muxes happening per IO. For now we have a generalized width
  32       // where each IO will have the same number of muxes.
  33      method  Action cell0_mux (Bit#(2) in);
  34      method  Action cell1_mux (Bit#(2) in);
  35      method  Action cell2_mux (Bit#(2) in);
  36       endinterface
  37
  38       interface PeripheralSide;
  39       // declare the interface to the IO cells.
  40       // Each IO cell will have 8 input field (output from pin mux
  41       // and on output field (input to pinmux)
  42           // interface declaration between IO-0 and pinmux
  43     (*always_ready,always_enabled*) method Bit#(1) io0_cell_outen;
  44     (*always_ready,always_enabled*) method Bit#(1) io0_cell_out;
  45     (*always_ready,always_enabled,result="io"*) method
  46                        Action io0_inputval (Bit#(1) in);
  47           // interface declaration between IO-1 and pinmux
  48     (*always_ready,always_enabled*) method Bit#(1) io1_cell_outen;
  49     (*always_ready,always_enabled*) method Bit#(1) io1_cell_out;
  50     (*always_ready,always_enabled,result="io"*) method
  51                        Action io1_inputval (Bit#(1) in);
  52           // interface declaration between IO-2 and pinmux
  53     (*always_ready,always_enabled*) method Bit#(1) io2_cell_outen;
  54     (*always_ready,always_enabled*) method Bit#(1) io2_cell_out;
  55     (*always_ready,always_enabled,result="io"*) method
  56                        Action io2_inputval (Bit#(1) in);
  57           // interface declaration between UART-0 and pinmux
  58     (*always_ready,always_enabled*) method  Action uart_tx (Bit#(1) in);
  59     (*always_ready,always_enabled*) method  Bit#(1) uart_rx;
  60           // interface declaration between GPIOA-0 and pinmux
  61     (*always_ready,always_enabled*) method  Action gpioa_a0_out (Bit#(1) in);
  62     (*always_ready,always_enabled*) method  Action gpioa_a0_outen (Bit#(1) in);
  63     (*always_ready,always_enabled*) method  Bit#(1) gpioa_a0_in;
  64     (*always_ready,always_enabled*) method  Action gpioa_a1_out (Bit#(1) in);
  65     (*always_ready,always_enabled*) method  Action gpioa_a1_outen (Bit#(1) in);
  66     (*always_ready,always_enabled*) method  Bit#(1) gpioa_a1_in;
  67     (*always_ready,always_enabled*) method  Action gpioa_a2_out (Bit#(1) in);
  68     (*always_ready,always_enabled*) method  Action gpioa_a2_outen (Bit#(1) in);
  69     (*always_ready,always_enabled*) method  Bit#(1) gpioa_a2_in;
  70           // interface declaration between TWI-0 and pinmux
  71     (*always_ready,always_enabled*) method  Action twi_sda_out (Bit#(1) in);
  72     (*always_ready,always_enabled*) method  Action twi_sda_outen (Bit#(1) in);
  73     (*always_ready,always_enabled*) method  Bit#(1) twi_sda_in;
  74     (*always_ready,always_enabled*) method  Action twi_scl_out (Bit#(1) in);
  75     (*always_ready,always_enabled*) method  Action twi_scl_outen (Bit#(1) in);
  76     (*always_ready,always_enabled*) method  Bit#(1) twi_scl_in;
  77    endinterface
  78
  79    interface Ifc_pinmux;
  80       interface MuxSelectionLines mux_lines;
  81       interface PeripheralSide peripheral_side;
  82    endinterface
  83    (*synthesize*)
  84    module mkpinmux(Ifc_pinmux);
  85
  86       // the followins wires capture the pin-mux selection
  87       // values for each mux assigned to a CELL
  88
  89       Wire#(Bit#(2)) wrcell0_mux<-mkDWire(0);
  90       Wire#(Bit#(2)) wrcell1_mux<-mkDWire(0);
  91       Wire#(Bit#(2)) wrcell2_mux<-mkDWire(0);
  92       // following wires capture signals to IO CELL if io-0 is
  93       // allotted to it
  94       Wire#(Bit#(1)) cell0_mux_out<-mkDWire(0);
  95       Wire#(Bit#(1)) cell0_mux_outen<-mkDWire(0);
  96       Wire#(Bit#(1)) cell0_mux_in<-mkDWire(0);
  97
  98       // following wires capture signals to IO CELL if io-1 is
  99       // allotted to it
 100       Wire#(Bit#(1)) cell1_mux_out<-mkDWire(0);
 101       Wire#(Bit#(1)) cell1_mux_outen<-mkDWire(0);
 102       Wire#(Bit#(1)) cell1_mux_in<-mkDWire(0);
 103
 104       // following wires capture signals to IO CELL if io-2 is
 105       // allotted to it
 106       Wire#(Bit#(1)) cell2_mux_out<-mkDWire(0);
 107       Wire#(Bit#(1)) cell2_mux_outen<-mkDWire(0);
 108       Wire#(Bit#(1)) cell2_mux_in<-mkDWire(0);
 109
 110       // following wires capture signals to IO CELL if uart-0 is
 111       // allotted to it
 112       // declare wruart_tx_*, set up as type 'out'
 113       Wire#(Bit#(1)) wruart_tx<-mkDWire(0);
 114       // declare wruart_rx_*, set up as type 'input'
 115       Wire#(Bit#(1)) wruart_rx<-mkDWire(0);
 116
 117       // following wires capture signals to IO CELL if gpioa-0 is
 118       // allotted to it
 119       Wire#(Bit#(1)) wrgpioa_a0_out<-mkDWire(0);
 120       Wire#(Bit#(1)) wrgpioa_a0_outen<-mkDWire(0);
 121       Wire#(Bit#(1)) wrgpioa_a0_in<-mkDWire(0);
 122       Wire#(Bit#(1)) wrgpioa_a1_out<-mkDWire(0);
 123       Wire#(Bit#(1)) wrgpioa_a1_outen<-mkDWire(0);
 124       Wire#(Bit#(1)) wrgpioa_a1_in<-mkDWire(0);
 125       Wire#(Bit#(1)) wrgpioa_a2_out<-mkDWire(0);
 126       Wire#(Bit#(1)) wrgpioa_a2_outen<-mkDWire(0);
 127       Wire#(Bit#(1)) wrgpioa_a2_in<-mkDWire(0);
 128
 129       // following wires capture signals to IO CELL if twi-0 is
 130       // allotted to it
 131       // declare wrtwi_sda_*, set up as type 'inout'
 132       Wire#(Bit#(1)) wrtwi_sda_out<-mkDWire(0);
 133       Wire#(Bit#(1)) wrtwi_sda_outen<-mkDWire(0);
 134       Wire#(Bit#(1)) wrtwi_sda_in<-mkDWire(0);
 135       // declare wrtwi_scl_*, set up as type 'inout'
 136       Wire#(Bit#(1)) wrtwi_scl_out<-mkDWire(0);
 137       Wire#(Bit#(1)) wrtwi_scl_outen<-mkDWire(0);
 138       Wire#(Bit#(1)) wrtwi_scl_in<-mkDWire(0);
 139
 140
 141       /*====== This where the muxing starts for each io-cell======*/
 142       // TODO: this needs to stop using GenericIOType and
 143       // set the output (and only the output) as a wire
 144        // output muxer for cell idx 0
 145       cell0_mux_out=
 146                         wrcell0_mux==0?wrgpioa_a0_out:
 147                         wrcell0_mux==1?wruart_tx_out:
 148                         wrcell0_mux==2?0: // unused
 149                         0; // unused
 150
 151       // TODO: here is needed something which sets a new
 152       // wire, cell0_mux_outen
 153       cell0_mux_outen=
 154                         wrcell0_mux==0?wrgpioa_a0_outen: // bi-directional
 155                         wrcell0_mux==1?1: // uart_tx is an output
 156                         wrcell0_mux==2?0: // unused
 157                         0; // unused
 158
 159       rule assign_wrgpioa_a0_in_on_cell0(wrcell0_mux==0);
 160         wrgpioa_a0_in<=cell0_mux_in;
 161       endrule
 162
 163       // TODO: this needs to stop using GenericIOType and
 164       // set the output (and only the output) as a wire
 165       // output muxer for cell idx 1
 166       cell1_mux_out=
 167                         wrcell1_mux==0?wrgpioa_a1_out:
 168                         wrcell1_mux==1?0: // uart_rx is an input
 169                         wrcell1_mux==2? wrtwi_sda_out:
 170                         0; // unused
 171
 172       // TODO: here is needed something which sets a new
 173       // wire, cell1_mux_outen
 174       cell1_mux_outen=
 175                         wrcell1_mux==0?gpioa_a1_outen: // bi-directional
 176                         wrcell1_mux==1?0: // uart_rx is an input
 177                         wrcell1_mux==2? wrtwi_sda_outen: // bi-directional
 178                         0; // unused
 179
 180       rule assign_wrgpioa_a1_in_on_cell1(wrcell1_mux==0);
 181         wrgpioa_a1_in<=cell1_mux_in;
 182       endrule
 183
 184
 185       rule assign_wruart_rx_on_cell1(wrcell1_mux==1);
 186         wruart_rx<=cell1_mux_in;
 187       endrule
 188
 189
 190       rule assign_wrtwi_sda_in_on_cell1(wrcell1_mux==2);
 191         wrtwi_sda_in<=cell1_mux_in;
 192       endrule
 193
 194       // TODO: this needs to stop using GenericIOType and
 195       // set the output (and only the output) as a wire
 196       // output muxer for cell idx 2
 197       cell2_mux_out=
 198                         wrcell2_mux==0?wrgpioa_a2_out:
 199                         wrcell2_mux==1?0: // unused
 200                         wrcell2_mux==2?wrtwi_scl_out:
 201                         0; // unused
 202
 203       // TODO: here is needed something which sets a new
 204       // wire, cell2_mux_outen
 205       cell2_mux_outen=
 206                         wrcell2_mux==0?wrgpioa_a2_outen: // bi-directional
 207                         wrcell2_mux==1?0: // unused
 208                         wrcell2_mux==2?wrtwi_scl_outen: // bi-directional
 209                         0; // unused
 210
 211       rule assign_wrgpioa_a2_in_on_cell2(wrcell2_mux==0);
 212         wrgpioa_a2_in<=cell2_mux_in;
 213       endrule
 214
 215
 216       rule assign_wrtwi_scl_in_on_cell2(wrcell2_mux==2);
 217         wrtwi_scl_in<=cell2_mux_in;
 218       endrule
 219
 220
 221       /*============================================================*/
 222
 223     interface mux_lines = interface MuxSelectionLines
 224
 225       method Action  cell0_mux(Bit#(2) in);
 226          wrcell0_mux<=in;
 227       endmethod
 228
 229       method Action  cell1_mux(Bit#(2) in);
 230          wrcell1_mux<=in;
 231       endmethod
 232
 233       method Action  cell2_mux(Bit#(2) in);
 234          wrcell2_mux<=in;
 235       endmethod
 236
 237     endinterface;
 238     interface peripheral_side = interface PeripheralSide
 239
 240       method io0_cell_out=cell0_mux_out;
 241       method io0_cell_outen=cell0_mux_outen;
 242       method Action  io0_inputval(Bit#(1) in);
 243          cell0_mux_in<=in;
 244       endmethod
 245
 246       method io1_cell_out=cell1_mux_out;
 247       method io1_cell_outen=cell1_mux_outen;
 248       method Action  io1_inputval(Bit#(1) in);
 249          cell1_mux_in<=in;
 250       endmethod
 251
 252       method io2_cell_out=cell2_mux_out;
 253       method io2_cell_outen=cell2_mux_outen;
 254       method Action  io2_inputval(Bit#(1) in);
 255          cell2_mux_in<=in;
 256       endmethod
 257
 258       method Action  uart_tx(Bit#(1) in);
 259          wruart_tx<=in;
 260       endmethod
 261       method uart_rx=wruart_rx;
 262
 263       method Action  gpioa_a0_out(Bit#(1) in);
 264          wrgpioa_a0_out<=in;
 265       endmethod
 266       method Action  gpioa_a0_outen(Bit#(1) in);
 267          wrgpioa_a0_outen<=in;
 268       endmethod
 269       method gpioa_a0_in=wrgpioa_a0_in;
 270       method Action  gpioa_a1_out(Bit#(1) in);
 271          wrgpioa_a1_out<=in;
 272       endmethod
 273       method Action  gpioa_a1_outen(Bit#(1) in);
 274          wrgpioa_a1_outen<=in;
 275       endmethod
 276       method gpioa_a1_in=wrgpioa_a1_in;
 277       method Action  gpioa_a2_out(Bit#(1) in);
 278          wrgpioa_a2_out<=in;
 279       endmethod
 280       method Action  gpioa_a2_outen(Bit#(1) in);
 281          wrgpioa_a2_outen<=in;
 282       endmethod
 283       method gpioa_a2_in=wrgpioa_a2_in;
 284
 285       method Action  twi_sda_out(Bit#(1) in);
 286          wrtwi_sda_out<=in;
 287       endmethod
 288       method Action  twi_sda_outen(Bit#(1) in);
 289          wrtwi_sda_outen<=in;
 290       endmethod
 291       method twi_sda_in=wrtwi_sda_in;
 292       method Action  twi_scl_out(Bit#(1) in);
 293          wrtwi_scl_out<=in;
 294       endmethod
 295       method Action  twi_scl_outen(Bit#(1) in);
 296          wrtwi_scl_outen<=in;
 297       endmethod
 298       method twi_scl_in=wrtwi_scl_in;
 299
 300      endinterface;
 301    endmodule
 302 endpackage