src/test_bsv/tests/Makefile

   1 ###############################################################################
   2 # Copyright (c) 2013 Potential Ventures Ltd
   3 # Copyright (c) 2013 SolarFlare Communications Inc
   4 # All rights reserved.
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are met:
   8 #     * Redistributions of source code must retain the above copyright
   9 #       notice, this list of conditions and the following disclaimer.
  10 #     * Redistributions in binary form must reproduce the above copyright
  11 #       notice, this list of conditions and the following disclaimer in the
  12 #       documentation and/or other materials provided with the distribution.
  13 #     * Neither the name of Potential Ventures Ltd,
  14 #       SolarFlare Communications Inc nor the
  15 #       names of its contributors may be used to endorse or promote products
  16 #       derived from this software without specific prior written permission.
  17 #
  18 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  19 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21 # DISCLAIMED. IN NO EVENT SHALL POTENTIAL VENTURES LTD BE LIABLE FOR ANY
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  23 # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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  27 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 ###############################################################################
  29
  30 TOPLEVEL_LANG ?= verilog
  31
  32 PWD=$(shell pwd)
  33 #COCOTB=$(PWD)/../../..
  34 COCOTB=~/src/verilog/cocotb
  35
  36 ifeq ($(OS),Msys)
  37 WPWD=$(shell sh -c 'pwd -W')
  38 PYTHONPATH := $(WPWD)/../model;$(PYTHONPATH)
  39 else
  40 WPWD=$(shell pwd)
  41 PYTHONPATH := $(WPWD)/../model:$(PYTHONPATH)
  42 endif
  43
  44 ifeq ($(TOPLEVEL_LANG),verilog)
  45     VERILOG_SOURCES = $(WPWD)/../verilog/mkpinmux.v
  46 else
  47     $(error "A valid value (verilog or vhdl) was not provided for TOPLEVEL_LANG=$(TOPLEVEL_LANG)")
  48 endif
  49
  50 TOPLEVEL := mkpinmux
  51 MODULE   := test_pinmux
  52
  53 include $(COCOTB)/makefiles/Makefile.inc
  54 include $(COCOTB)/makefiles/Makefile.sim