6 from litex
.soc
.interconnect
.stream
import Gearbox
9 def data_generator(dut
, gearbox
, datas
):
10 prng
= random
.Random(42)
11 for i
, data
in enumerate(datas
):
12 while prng
.randrange(4):
14 yield gearbox
.sink
.valid
.eq(1)
15 yield gearbox
.sink
.data
.eq(data
)
17 while (yield gearbox
.sink
.ready
) == 0:
19 yield gearbox
.sink
.valid
.eq(0)
22 def data_checker(dut
, gearbox
, datas
):
23 prng
= random
.Random(42)
25 for i
, reference
in enumerate(datas
):
26 yield gearbox
.source
.ready
.eq(1)
28 while (yield gearbox
.source
.valid
) == 0:
30 data
= (yield gearbox
.source
.data
)
33 yield gearbox
.source
.ready
.eq(0)
34 while prng
.randrange(4):
38 class GearboxDUT(Module
):
40 self
.submodules
.gearbox0
= Gearbox(20, 32)
41 self
.submodules
.gearbox1
= Gearbox(32, 20)
42 self
.comb
+= self
.gearbox0
.source
.connect(self
.gearbox1
.sink
)
45 class TestGearbox(unittest
.TestCase
):
46 def test_gearbox(self
):
47 prng
= random
.Random(42)
49 datas
= [prng
.randrange(2**20) for i
in range(128)]
51 data_generator(dut
, dut
.gearbox0
, datas
),
52 data_checker(dut
, dut
.gearbox1
, datas
)
54 run_simulation(dut
, generators
, vcd_name
="sim.vcd")
55 self
.assertEqual(dut
.errors
, 0)