- __ ___ _ ____ _____
- / |/ / (_) / __/__ / ___/
- / /|_/ / / / _\ \/ _ \/ /__
- /_/ /_/ /_/ /___/\___/\___/
-
-a high performance and small footprint SoC based on Migen
-
-
-[> Features
------------
- * LatticeMico32 CPU, modified to include an optional MMU (experimental).
- * mor1kx (a better OpenRISC implementation) as alternative CPU option.
- * High performance memory controller capable of issuing several SDRAM commands
- per FPGA cycle.
- * Supports SDR, DDR, LPDDR, DDR2 and DDR3.
- * Provided peripherals: UART, GPIO, timer, GPIO, NOR flash controller, SPI
- flash controller, Ethernet MAC, and more.
- * High performance:
- - on Spartan-6, 83MHz system clock frequencies, 10+Gbps DDR
- SDRAM bandwidth, 1080p 32bpp framebuffer, etc.
- - on Kintex-7, 125MHz system clock frequencies (up to 200MHz without DDR3),
- 64Gbps DDR3 SDRAM bandwidth.
- * Low resource usage: basic implementation fits easily in Spartan-6 LX9.
- * Portable and easy to customize thanks to Python- and Migen-based
- architecture.
- * Design new peripherals using Migen and benefit from automatic CSR maps
- and logic, etc.
- * Possibility to encapsulate legacy Verilog/VHDL code.
-
-MiSoC comes with built-in support for the following boards:
- * Mixxeo, the digital video mixer from M-Labs [XC6SLX45]
- * Milkymist One, the original M-Labs video synthesizer [XC6SLX45]
- * Papilio Pro, a simple and low-cost development board [XC6SLX9]
- * KC705, a Kintex-7 devboard from Xilinx [XC7K325T]
-MiSoC is portable and support for other boards can easily be added as external
-modules.
+ __ _ __ _ __
+ / / (_) /____ | |/_/
+ / /__/ / __/ -_)> <
+ /____/_/\__/\__/_/|_|
+ Migen inside
+
+ Build your hardware, easily!
+ Copyright 2012-2016 Enjoy-Digital
+
+[> Intro
+--------
+LiteX is an alternative to Migen/MiSoC maintained and used by Enjoy-Digital
+to build our cores, integrate them in complete SoC and load/flash them to
+the hardware and experiment new features.
+
+The structure of LiteX is kept close to Migen/MiSoC to ease collaboration
+between projects and efforts are made to keep cores developed with LiteX
+compatible with Migen/MiSoC.
+
+[> License
+----------
+LiteX is Copyright (c) 2012-2015 Enjoy-Digital under BSD Lisense.
+Since it is based on Migen/MiSoC, please also refer to LICENSE file in gen/soc
+directory or git history to get correct copyrights.
+
+[> Sub-packages
+---------------
+gen:
+ Provides specific or experimentatl modules to generate HDL that are not integrated
+ in Migen.
+
+build:
+ Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to
+ simulate HDL code or full SoCs.
+
+soc:
+ Provides definitions/modules to build cores (bus, bank, flow), cores and tools
+ to build a SoC from such cores.
+
+boards:
+ Provides platforms and targets for the supported boards.