+class eint(PBase):
+
+ def slowimport(self):
+ size = len(self.peripheral.pinspecs)
+ return " `define NUM_EINTS %d" % size
+
+ def mkslow_peripheral(self, size=0):
+ size = len(self.peripheral.pinspecs)
+ return " Wire#(Bit#(%d)) wr_interrupt <- mkWire();" % size
+
+ def axi_slave_name(self, name, ifacenum):
+ return ''
+
+ def axi_slave_idx(self, idx, name, ifacenum):
+ return ('', 0)
+
+ def axi_addr_map(self, name, ifacenum):
+ return ''
+
+ def ifname_tweak(self, pname, typ, txt):
+ if typ != 'in':
+ return txt
+ print "ifnameweak", pname, typ, txt
+ return "wr_interrupt[{0}] <= ".format(pname)
+
+ def mk_pincon(self, name, count):
+ ret = [PBase.mk_pincon(self, name, count)]
+ size = len(self.peripheral.pinspecs)
+ ret.append(eint_pincon_template.format(size))
+ ret.append(" rule con_%s%d_io_in;" % (name, count))
+ ret.append(" wr_interrupt <= ({")
+ for idx, p in enumerate(self.peripheral.pinspecs):
+ pname = p['name']
+ sname = self.peripheral.pname(pname).format(count)
+ ps = "pinmux.peripheral_side.%s" % sname
+ comma = '' if idx == size - 1 else ','
+ ret.append(" {0}{1}".format(ps, comma))
+ ret.append(" });")
+ ret.append(" endrule")
+
+ return '\n'.join(ret)
+
+
+eint_pincon_template = '''\
+ // TODO: offset i by the number of eints already used
+ for(Integer i=0;i<{0};i=i+ 1)begin
+ rule connect_int_to_plic(wr_interrupt[i]==1);
+ ff_gateway_queue[i].enq(1);
+ plic.ifc_external_irq[i].irq_frm_gateway(True);
+ endrule
+ end
+'''
+
+
+class jtag(PBase):
+
+ def axi_slave_name(self, name, ifacenum):
+ return ''
+
+ def axi_slave_idx(self, idx, name, ifacenum):
+ return ('', 0)
+
+ def axi_addr_map(self, name, ifacenum):
+ return ''
+
+ def slowifdeclmux(self):
+ return " method Action jtag_ms (Bit#(1) in);\n" + \
+ " method Bit#(1) jtag_di;\n" + \
+ " method Action jtag_do (Bit#(1) in);\n" + \
+ " method Action jtag_ck (Bit#(1) in);"
+
+ def slowifinstance(self):
+ return jtag_method_template # bit of a lazy hack this...
+
+jtag_method_template = """\
+ method Action jtag_ms (Bit#(1) in);
+ pinmux.peripheral_side.jtag_ms(in);
+ endmethod
+ method Bit#(1) jtag_di=pinmux.peripheral_side.jtag_di;
+ method Action jtag_do (Bit#(1) in);
+ pinmux.peripheral_side.jtag_do(in);
+ endmethod
+ method Action jtag_ck (Bit#(1) in);
+ pinmux.peripheral_side.jtag_ck(in);
+ endmethod
+"""
+
+class sdmmc(PBase):
+
+ def slowimport(self):
+ return " import sdcard_dummy :: *;"
+
+ def slowifdecl(self):
+ return " interface QSPI_out sd{0}_out;\n" + \
+ " method Bit#(1) sd{0}_isint;"
+
+ def num_axi_regs32(self):
+ return 13
+
+ def mkslow_peripheral(self):
+ return " Ifc_sdcard_dummy sd{0} <- mksdcard_dummy();"
+
+ def _mk_connection(self, name=None, count=0):
+ return "sd{0}.slave"
+
+ def pinname_in(self, pname):
+ return "%s_in" % pname
+
+ def pinname_out(self, pname):
+ if pname.startswith('d'):
+ return "%s_out" % pname
+ return pname
+
+ def pinname_outen(self, pname):
+ if pname.startswith('d'):
+ return "%s_outen" % pname
+
+
+class spi(PBase):
+
+ def slowimport(self):
+ return " import qspi :: *;"
+
+ def slowifdecl(self):
+ return " interface QSPI_out spi{0}_out;\n" + \
+ " method Bit#(1) spi{0}_isint;"
+
+ def num_axi_regs32(self):
+ return 13
+
+ def mkslow_peripheral(self):
+ return " Ifc_qspi spi{0} <- mkqspi();"
+
+ def _mk_connection(self, name=None, count=0):
+ return "spi{0}.slave"
+
+ def pinname_out(self, pname):
+ return {'clk': 'out.clk_o',
+ 'nss': 'out.ncs_o',
+ 'mosi': 'out.io_o[0]',
+ 'miso': 'out.io_o[1]',
+ }.get(pname, '')
+
+ def pinname_outen(self, pname):
+ return {'clk': 1,
+ 'nss': 1,
+ 'mosi': 'out.io_enable[0]',
+ 'miso': 'out.io_enable[1]',
+ }.get(pname, '')
+
+ def mk_pincon(self, name, count):
+ ret = [PBase.mk_pincon(self, name, count)]
+ # special-case for gpio in, store in a temporary vector
+ plen = len(self.peripheral.pinspecs)
+ ret.append(" // XXX NSS and CLK are hard-coded master")
+ ret.append(" // TODO: must add spi slave-mode")
+ ret.append(" // all ins done in one rule from 4-bitfield")
+ ret.append(" rule con_%s%d_io_in;" % (name, count))
+ ret.append(" {0}{1}.out.io_i({{".format(name, count))
+ for idx, pname in enumerate(['mosi', 'miso']):
+ sname = self.peripheral.pname(pname).format(count)
+ ps = "pinmux.peripheral_side.%s_in" % sname
+ ret.append(" {0},".format(ps))
+ ret.append(" 1'b0,1'b0")
+ ret.append(" });")
+ ret.append(" endrule")
+ return '\n'.join(ret)
+
+