overlapping GPIO on E

[pinmux.git] / src / spec / ls2.py

diff --git a/src/spec/ls2.py b/src/spec/ls2.py
index 7a9380741d97a53c487b03ece73b3927244b46af..c479b5fdb3c5a1d829227bec43143297b9619f66 100644 (file)
--- a/src/spec/ls2.py
+++ b/src/spec/ls2.py
@@ -59,13 +59,15 @@ def pinspec():
 
     ps = PinSpec(pinbanks, fixedpins, function_names)
 
 
     ps = PinSpec(pinbanks, fixedpins, function_names)
 

-    ps.sdram1("", ('W', 0), 0, 15, 6, rev=True) # AD4-9, turned round
+    ps.gpio("", ('W', 0), 0, 0, 6) # GPIO 0-5
+    ps.sdram1("", ('W', 0), 1, 15, 6, rev=True) # AD4-9, turned round

     ps.vdd("E", ('W', 6), 0, 0, 1)
     ps.vss("E", ('W', 7), 0, 0, 1)
     ps.vdd("I", ('W', 8), 0, 0, 1)
     ps.vss("I", ('W', 9), 0, 0, 1)
     ps.vdd("E", ('W', 6), 0, 0, 1)
     ps.vss("E", ('W', 7), 0, 0, 1)
     ps.vdd("I", ('W', 8), 0, 0, 1)
     ps.vss("I", ('W', 9), 0, 0, 1)

-    ps.sdram1("", ('W', 10), 0, 0, 15, rev=True) # SDRAM DAM0, D0-7, AD0-3
-    ps.mi2c("", ('W', 26), 0, 0, 2)
+    ps.gpio("", ('W', 10), 0, 6, 18) # GPIO 6-23
+    ps.sdram1("", ('W', 10), 1, 0, 15, rev=True) # SDRAM DAM0, D0-7, AD0-3
+    ps.mi2c("", ('W', 26), 1, 0, 2)

     ps.vss("I", ('W', 28), 0, 1, 1)
     ps.vdd("I", ('W', 29), 0, 1, 1)
     ps.vss("E", ('W', 30), 0, 1, 1)
     ps.vss("I", ('W', 28), 0, 1, 1)
     ps.vdd("I", ('W', 29), 0, 1, 1)
     ps.vss("E", ('W', 30), 0, 1, 1)


@@ -101,7 +103,7 @@ def pinspec():
     ps.vdd("I", ('E', 23), 0, 5, 1)
     ps.vss("E", ('E', 24), 0, 5, 1)
     ps.vdd("E", ('E', 25), 0, 5, 1)
     ps.vdd("I", ('E', 23), 0, 5, 1)
     ps.vss("E", ('E', 24), 0, 5, 1)
     ps.vdd("E", ('E', 25), 0, 5, 1)

-    ps.gpio("", ('E', 26), 0, 14, 5) # GPIO 14-18
+    ps.gpio("", ('E', 26), 0, 16, 5) # GPIO 14-18

     ps.rgmii("1", ('E', 26), 1, 14, 5) # more RGMII-2
     ps.eint("", ('E', 28), 2, 0, 3)
     ps.sys("", ('E', 31), 0, 5, 1) # analog VCO out in right top
     ps.rgmii("1", ('E', 26), 1, 14, 5) # more RGMII-2
     ps.eint("", ('E', 28), 2, 0, 3)
     ps.sys("", ('E', 31), 0, 5, 1) # analog VCO out in right top


@@ -139,6 +141,7 @@ def pinspec():
             'UART0', 'GPIOS', 'GPIOE', 'JTAG', 'PWM', 'EINT',
              'VDD', 'VSS', 'SYS',
                 'MTWI', 'MSPI0',
             'UART0', 'GPIOS', 'GPIOE', 'JTAG', 'PWM', 'EINT',
              'VDD', 'VSS', 'SYS',
                 'MTWI', 'MSPI0',

+                'RG0', 'RG1',

                 # 'MSPI1', litex problem 25mar2021
                 'SDR']
     ls180_eint = []
                 # 'MSPI1', litex problem 25mar2021
                 'SDR']
     ls180_eint = []


@@ -151,6 +154,8 @@ def pinspec():
         'MSPI1': '',
         'UART0': '',
         'LPC1': '',
         'MSPI1': '',
         'UART0': '',
         'LPC1': '',

+        'RG0': '',
+        'RG1': '',

         'SYS': '',
         'LPC2': '',
         'SDR': '',
         'SYS': '',
         'LPC2': '',
         'SDR': '',