-[submodule "misoc/cores/lm32/verilog/submodule"]
- path = misoc/cores/lm32/verilog/submodule
+[submodule "litex/soc/cores/cpu/lm32/verilog/submodule"]
+ path = litex/soc/cores/cpu/lm32/verilog/submodule
url = https://github.com/m-labs/lm32.git
-[submodule "misoc/cores/mor1kx/verilog"]
- path = misoc/cores/mor1kx/verilog
+[submodule "litex/soc/cores/cpu/mor1kx/verilog"]
+ path = litex/soc/cores/cpu/mor1kx/verilog
url = https://github.com/openrisc/mor1kx.git
-[submodule "misoc/software/compiler_rt"]
- path = misoc/software/compiler_rt
+[submodule "litex/soc/software/compiler_rt"]
+ path = litex/soc/software/compiler_rt
url = http://llvm.org/git/compiler-rt.git
-[submodule "misoc/software/unwinder"]
- path = misoc/software/unwinder
- url = https://github.com/whitequark/libunwind
+[submodule "litex/soc/cores/cpu/picorv32/verilog"]
+ path = litex/soc/cores/cpu/picorv32/verilog
+ url = https://github.com/cliffordwolf/picorv32