boards/platforms: add hdmi_in/hdmi_out/ethernet/dram to nexys_video

[litex.git] / README

diff --git a/README b/README
index b11280616190467ab867003c05cc4d2077590075..646283f7d7510426b38327f22717678e2b8df436 100644 (file)
--- a/README
+++ b/README
@@ -2,29 +2,33 @@
                       / /  (_) /____ | |/_/
                      / /__/ / __/ -_)>  <
                     /____/_/\__/\__/_/|_|
+                         Migen inside
 
                 Build your hardware, easily!
-                Copyright 2015 Enjoy-Digital
+             Copyright 2012-2015 Enjoy-Digital
 
 [> Intro
 ---------
-LiteX is an alternative (fork) to Migen/MiSoC maintained and used by Enjoy-Digital
-to build our cores, integrate them in complete SoC and load/flash them to the
-hardware.
+LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build 
+our cores, integrate them in complete SoC and load/flash them to the hardware.
 
-The structure of LiteX is kept close to Migen/MiSoC to ease collaboration
-between projects.
+The structure of LiteX is kept close to MiSoC to ease collaboration between 
+projects and efforts are made to keep cores developed with LiteX compatible
+with MiSoC (user will only need to import new modules introduced by LiteX).
+
+LiteX is based on Migen.
 
 [> License
 -----------
-LiteX is copyright (c) 2015 Enjoy-Digital under BSD Lisense.
-Since it is based on MiSoC/Migen, please also refer to LICENSE files in soc/gen 
-directories or git history to get correct copyrights.
+LiteX is Copyright (c) 2012-2015 Enjoy-Digital under BSD Lisense.
+Since it is based on MiSoC, please also refer to LICENSE file in soc directory
+or git history to get correct copyrights.
 
 [> Sub-packages
------------
+----------------
 gen:
-  Provides tools and simple modules to generate HDL.
+  Provides specific or experimentatl modules to generate HDL that are not integrated
+  in Migen.
 
 build:
   Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to
@@ -42,7 +46,8 @@ boards:
 0. If cloned from Git without the --recursive option, get the submodules:
   git submodule update --init
 
-1. Install Python 3.3+ and FPGA vendor's development tools and JTAG tools.
+1. Install Python 3.3+, Migen and FPGA vendor's development tools and JTAG tools.
+  Get Migen from: https://github.com/m-labs/migen
 
 2. Compile and install binutils. Take the latest version from GNU.
   mkdir build && cd build