build/xilinx/vivado: improve directive support
[litex.git] / litex / build / xilinx / vivado.py
index eac6c6b7f84485406607b2aacf4388d063a1651f..244288e050dd524f4951c9a629f5efc85cb92abc 100644 (file)
@@ -5,7 +5,7 @@ import os
 import subprocess
 import sys
 import math
-from distutils import spawn
+from distutils.spawn import find_executable
 
 from migen.fhdl.structure import _Fragment
 
@@ -58,17 +58,15 @@ def _build_xdc(named_sc, named_pc):
 
 def _run_vivado(build_name, vivado_path, source, ver=None):
     if sys.platform == "win32" or sys.platform == "cygwin":
-        build_script_contents = "REM Autogenerated by Migen\n"
+        build_script_contents = "REM Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\n"
         build_script_contents += "vivado -mode batch -source " + build_name + ".tcl\n"
         build_script_file = "build_" + build_name + ".bat"
         tools.write_to_file(build_script_file, build_script_contents)
         command = build_script_file
     else:
-        build_script_contents = "# Autogenerated by Migen\nset -e\n"
-
-        # No reason to search for vivado if it's already in our $PATH
-        # https://stackoverflow.com/questions/377017/test-if-executable-exists-in-python
-        if not spawn.find_executable("vivado"):
+        build_script_contents = "# Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\nset -e\n"
+        # Only source Vivado settings if not already in our $PATH
+        if not find_executable("vivado"):
             # For backwards compatibility with ISE paths, also
             # look for a version in a subdirectory named "Vivado"
             # under the current directory.
@@ -107,7 +105,14 @@ class XilinxVivadoToolchain:
         self.bitstream_commands = []
         self.additional_commands = []
         self.pre_synthesis_commands = []
-        self.with_phys_opt = False
+        self.with_phys_opt = False  # deprecated -> vivado_post_place_phys_opt_directive
+        self.incremental_implementation = False
+        self.vivado_synth_directive = 'default'
+        self.opt_directive = 'default'
+        self.vivado_place_directive = 'default'
+        self.vivado_post_place_phys_opt_directive = None
+        self.vivado_route_directive = 'default'
+        self.vivado_post_route_phys_opt_directive = 'default'
         self.clocks = dict()
         self.false_paths = set()
 
@@ -115,6 +120,7 @@ class XilinxVivadoToolchain:
         assert synth_mode in ["vivado", "yosys"]
         tcl = []
         tcl.append("create_project -force -name {} -part {}".format(build_name, platform.device))
+        tcl.append("set_msg_config -id {Common 17-55} -new_severity {Warning}")
         if enable_xpm:
             tcl.append("set_property XPM_LIBRARIES {XPM_CDC XPM_MEMORY} [current_project]")
         if synth_mode == "vivado":
@@ -142,10 +148,11 @@ class XilinxVivadoToolchain:
         tcl.extend(c.format(build_name=build_name) for c in self.pre_synthesis_commands)
 
         if synth_mode == "vivado":
+            synth_cmd = "synth_design -directive {} -top {} -part {}".format(self.vivado_synth_directive,
+                                                                             build_name, platform.device)
             if platform.verilog_include_paths:
-                tcl.append("synth_design -top {} -part {} -include_dirs {{{}}}".format(build_name, platform.device, " ".join(platform.verilog_include_paths)))
-            else:
-                tcl.append("synth_design -top {} -part {}".format(build_name, platform.device))
+                synth_cmd += " -include_dirs {{{}}}".format(" ".join(platform.verilog_include_paths))
+            tcl.append(synth_cmd)
         elif synth_mode == "yosys":
             tcl.append("read_edif {}.edif".format(build_name))
             tcl.append("link_design -top {} -part {}".format(build_name, platform.device))
@@ -155,17 +162,22 @@ class XilinxVivadoToolchain:
         tcl.append("report_timing_summary -file {}_timing_synth.rpt".format(build_name))
         tcl.append("report_utilization -hierarchical -file {}_utilization_hierarchical_synth.rpt".format(build_name))
         tcl.append("report_utilization -file {}_utilization_synth.rpt".format(build_name))
-        tcl.append("opt_design")
-        tcl.append("place_design")
+        tcl.append("opt_design -directive {}".format(self.opt_directive))
+        if self.incremental_implementation:
+            tcl.append("read_checkpoint -incremental {}_route.dcp".format(build_name))
+        tcl.append("place_design -directive {}".format(self.vivado_place_directive))
         if self.with_phys_opt:
-            tcl.append("phys_opt_design -directive AddRetime")
+            tools.deprecated_warning('with_phys_opt -> vivado_post_place_phys_opt_directive')
+            self.vivado_post_place_phys_opt_directive = 'AddRetime'
+        if self.vivado_post_place_phys_opt_directive:
+            tcl.append("phys_opt_design -directive {}".format(self.vivado_post_place_phys_opt_directive))
         tcl.append("report_utilization -hierarchical -file {}_utilization_hierarchical_place.rpt".format(build_name))
         tcl.append("report_utilization -file {}_utilization_place.rpt".format(build_name))
         tcl.append("report_io -file {}_io.rpt".format(build_name))
         tcl.append("report_control_sets -verbose -file {}_control_sets.rpt".format(build_name))
         tcl.append("report_clock_utilization -file {}_clock_utilization.rpt".format(build_name))
-        tcl.append("route_design")
-        tcl.append("phys_opt_design")
+        tcl.append("route_design -directive {}".format(self.vivado_route_directive))
+        tcl.append("phys_opt_design -directive {}".format(self.vivado_post_route_phys_opt_directive))
         tcl.append("report_timing_summary -no_header -no_detailed_paths")
         tcl.append("write_checkpoint -force {}_route.dcp".format(build_name))
         tcl.append("report_route_status -file {}_route_status.rpt".format(build_name))