core/cpu: integrate Zynq as a classical CPU (Zynq7000), deprecate SoCZynq.

[litex.git] / litex / soc / integration / builder.py

diff --git a/litex/soc/integration/builder.py b/litex/soc/integration/builder.py
index 2c3044d27923dd25284ff26120281051939da2bf..2648e4b0d042ece12a8d541ef74a4de7596e9a4d 100644 (file)
--- a/litex/soc/integration/builder.py
+++ b/litex/soc/integration/builder.py
@@ -17,9 +17,15 @@ import shutil
 from litex import get_data_mod
 from litex.build.tools import write_to_file
 from litex.soc.integration import export, soc_core
-
-__all__ = ["soc_software_packages", "soc_directory",
-           "Builder", "builder_args", "builder_argdict"]
+from litex.soc.cores import cpu
+
+__all__ = [
+    "soc_software_packages",
+    "soc_directory",
+    "Builder",
+    "builder_args",
+    "builder_argdict"
+]
 
 
 soc_software_packages = [
@@ -84,27 +90,13 @@ class Builder:
         os.makedirs(self.include_dir, exist_ok=True)
         os.makedirs(self.generated_dir, exist_ok=True)
 
-        if self.soc.cpu_type is not None:
+        if self.soc.cpu_type not in [None, "zynq7000"]:
             variables_contents = []
             def define(k, v):
                 variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
 
             for k, v in export.get_cpu_mak(self.soc.cpu, self.compile_software):
                 define(k, v)
-            # Distinguish between LiteX and MiSoC.
-            define("LITEX", "1")
-            # Distinguish between applications running from main RAM and
-            # flash for user-provided software packages.
-            exec_profiles = {
-                "COPY_TO_MAIN_RAM" : "0",
-                "EXECUTE_IN_PLACE" : "0"
-            }
-            if "main_ram" in self.soc.mem_regions.keys():
-                exec_profiles["COPY_TO_MAIN_RAM"] = "1"
-            else:
-                exec_profiles["EXECUTE_IN_PLACE"] = "1"
-            for k, v in exec_profiles.items():
-                define(k, v)
             define(
                 "COMPILER_RT_DIRECTORY",
                 get_data_mod("software", "compiler_rt").data_location)
@@ -136,8 +128,11 @@ class Builder:
             export.get_soc_header(self.soc.constants))
         write_to_file(
             os.path.join(self.generated_dir, "csr.h"),
-            export.get_csr_header(self.soc.csr_regions,
-                                         self.soc.constants)
+            export.get_csr_header(
+                regions   = self.soc.csr_regions,
+                constants = self.soc.constants,
+                csr_base  = self.soc.mem_regions['csr'].origin
+            )
         )
         write_to_file(
             os.path.join(self.generated_dir, "git.h"),