make sure #!/usr/bin/env python3 is before copyright header

[litex.git] / litex / tools / litex_sim.py

diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py
index 1c0769aef9afbf91995b446feaf5cf497c372c07..afd359290d4c2bdfb47fc3716698d5e471682441 100755 (executable)
--- a/litex/tools/litex_sim.py
+++ b/litex/tools/litex_sim.py
@@ -1,5 +1,9 @@
 #!/usr/bin/env python3
 
+# This file is Copyright (c) 2015-2019 Florent Kermarrec <florent@enjoy-digital.fr>
+# This file is Copyright (c) 2017 Pierre-Olivier Vauboin <po@lambdaconcept>
+# License: BSD
+
 import argparse
 
 from migen import *
@@ -214,10 +218,10 @@ def main():
     sim_config = SimConfig(default_clk="sys_clk")
     sim_config.add_module("serial2console", "serial")
 
-    cpu_endianness = "big"
+    cpu_endianness = "little"
     if "cpu_type" in soc_kwargs:
-        if soc_kwargs["cpu_type"] in ["picorv32", "vexriscv"]:
-            cpu_endianness = "little"
+        if soc_kwargs["cpu_type"] in ["mor1kx", "lm32"]:
+            cpu_endianness = "big"
 
     if args.rom_init:
         soc_kwargs["integrated_rom_init"] = get_mem_data(args.rom_init, cpu_endianness)