P <- (RA)
G <- (RB)
temp <- (P|G)+G
- RT <- temp^P
+ RT <- temp^P
Special Registers Altered:
CR0 (if Rc=1)
# DRAFT Bitmanip Masked
-
+
BM2-Form
-
+
* bmask RT,RA,RB,bm
Pseudo-code:
if mode3 = 0 then result <- a1 | a2
if mode3 = 1 then result <- a1 & a2
if mode3 = 2 then result <- a1 ^ a2
- if mode3 = 3 then result <- UNDEFINED
+ if mode3 = 3 then result <- undefined([0]*XLEN)
result <- result & mask
# optionally restore masked-out bits
if L = 1 then
None
+# Load Floating-Point Immediate
+
+DX-Form
+
+* fmvis FRS,D
+
+Pseudo-code:
+
+ bf16 <- d0 || d1 || d2
+ fp32 <- bf16 || [0]*16
+ FRS <- DOUBLE(fp32)
+
+Special Registers Altered:
+
+ None
+
+# Float Replace Lower-Half Single, Immediate
+
+DX-Form
+
+* fishmv FRS,D
+
+Pseudo-code:
+
+ fp32 <- SINGLE((FRS))
+ fp32[16:31] <- d0 || d1 || d2
+ FRS <- DOUBLE(fp32)
+
+Special Registers Altered:
+
+ None