use brackets round (XLEN/2) in divw pseudocode
[openpower-isa.git] / openpower / isa / fixedarith.mdwn
index 7e98475ef54765a849501385533a433d6f34c9e0..46f635294a0ecda189782a11ae985d443a674578 100644 (file)
@@ -388,16 +388,16 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:31] <- (RA)[32:63]
-    divisor[0:31] <- (RB) [32:63]
-    if (((dividend = 0x8000_0000) &
-         (divisor = [1]*32)) |
-         (divisor = [0]*32)) then
-        RT[0:63] <- undefined([0]*64)
+    dividend[0:(XLEN/2)-1] <- (RA)[XLEN/2:XLEN-1]
+    divisor[0:(XLEN/2)-1] <- (RB) [XLEN/2:XLEN-1]
+    if (((dividend = (0b1 || ([0b0] * ((XLEN/2)-1)))) &
+         (divisor = [1]*(XLEN/2))) |
+         (divisor = [0]*(XLEN/2))) then
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
         overflow <- 1
     else
-        RT[32:63] <- DIVS(dividend, divisor)
-        RT[0:31] <- undefined([0]*32)
+        RT[XLEN/2:XLEN-1] <- DIVS(dividend, divisor)
+        RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
         overflow <- 0
 
 Special Registers Altered:
@@ -416,14 +416,14 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:31] <- (RA)[32:63]
-    divisor[0:31] <- (RB)[32:63]
+    dividend[0:(XLEN/2)-1] <- (RA)[XLEN/2:XLEN-1]
+    divisor[0:(XLEN/2)-1] <- (RB)[XLEN/2:XLEN-1]
     if divisor != 0 then
-        RT[32:63] <- dividend / divisor
-        RT[0:31] <- undefined([0]*32)
+        RT[XLEN/2:XLEN-1] <- dividend / divisor
+        RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
         overflow <- 0
     else
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
         overflow <- 1
 
 Special Registers Altered:
@@ -442,23 +442,23 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:63] <- (RA)[32:63] || [0]*32
-    divisor[0:63] <- EXTS64((RB)[32:63])
-    if (((dividend = 0x8000_0000_0000_0000) &
-         (divisor = [1]*64)) |
-         (divisor = [0]*64)) then
+    dividend[0:XLEN-1] <- (RA)[XLEN/2:XLEN-1] || [0]*(XLEN/2)
+    divisor[0:XLEN-1] <- EXTS64((RB)[XLEN/2:XLEN-1])
+    if (((dividend = (0b1 || ([0b0] * (XLEN-1)))) &
+         (divisor = [1]*XLEN)) |
+         (divisor = [0]*XLEN)) then
         overflow <- 1
     else
         result <- DIVS(dividend, divisor)
-        result32[0:63] <- EXTS64(result[32:63])
-        if (result32 = result) then
-            RT[32:63] <- result[32:63]
-            RT[0:31] <- undefined([0]*32)
+        result_half[0:XLEN-1] <- EXTS64(result[XLEN/2:XLEN-1])
+        if (result_half = result) then
+            RT[XLEN/2:XLEN-1] <- result[XLEN/2:XLEN-1]
+            RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
             overflow <- 0
         else
             overflow <- 1
     if overflow = 1 then
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
 
 Special Registers Altered:
 
@@ -476,20 +476,20 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:63] <- (RA)[32:63] || [0]*32
-    divisor[0:63] <- [0]*32 || (RB)[32:63]
-    if (divisor = [0]*64) then
+    dividend[0:XLEN-1] <- (RA)[XLEN/2:XLEN-1] || [0]*(XLEN/2)
+    divisor[0:XLEN-1] <- [0]*(XLEN/2) || (RB)[XLEN/2:XLEN-1]
+    if (divisor = [0]*XLEN) then
         overflow <- 1
     else
         result <- dividend / divisor
-        if RA[32:63] <u RB[32:63] then
-            RT[32:63] <- result[32:63]
-            RT[0:31] <- undefined([0]*32)
+        if RA[XLEN/2:XLEN-1] <u RB[XLEN/2:XLEN-1] then
+            RT[XLEN/2:XLEN-1] <- result[XLEN/2:XLEN-1]
+            RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
             overflow <- 0
         else
             overflow <- 1
     if overflow = 1 then
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
 
 Special Registers Altered:
 
@@ -504,16 +504,16 @@ X-Form
 
 Pseudo-code:
 
-    dividend[0:31] <- (RA)[32:63]
-    divisor[0:31] <- (RB)[32:63]
-    if (((dividend = 0x8000_0000) &
-         (divisor = [1]*32)) |
-         (divisor = [0]*32)) then
-        RT[0:63] <- undefined([0]*64)
+    dividend[0:(XLEN/2)-1] <- (RA)[XLEN/2:XLEN-1]
+    divisor[0:(XLEN/2)-1] <- (RB)[XLEN/2:XLEN-1]
+    if (((dividend = (0b1 || ([0b0] * ((XLEN/2)-1)))) &
+         (divisor = [1]*(XLEN/2))) |
+         (divisor = [0]*(XLEN/2))) then
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
         overflow <- 1
     else
-        RT[0:63] <- EXTS64(MODS(dividend, divisor))
-        RT[0:31] <- undefined(RT[0:31])
+        RT[0:XLEN-1] <- EXTS64(MODS(dividend, divisor))
+        RT[0:(XLEN/2)-1] <- undefined(RT[0:(XLEN/2)-1])
         overflow <- 0
 
 Special Registers Altered:
@@ -528,14 +528,14 @@ X-Form
 
 Pseudo-code:
 
-    dividend[0:31] <- (RA) [32:63]
-    divisor [0:31] <- (RB) [32:63]
-    if divisor = [0]*32 then
-        RT[0:63] <- undefined([0]*64)
+    dividend[0:(XLEN/2)-1] <- (RA)[XLEN/2:63]
+    divisor [0:(XLEN/2)-1] <- (RB)[XLEN/2:63]
+    if divisor = [0]*(XLEN/2) then
+        RT[0:XLEN-1] <- undefined([0]*64)
         overflow <- 1
     else
-        RT[32:63] <- dividend % divisor
-        RT[0:31] <- undefined([0]*32)
+        RT[XLEN/2:XLEN-1] <- dividend % divisor
+        RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
         overflow <- 0
 
 Special Registers Altered:
@@ -668,12 +668,12 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:63] <- (RA)
-    divisor[0:63] <- (RB)
-    if (((dividend = 0x8000_0000_0000_0000) &
-         (divisor = [1]*64)) |
-         (divisor = [0]*64)) then
-        RT[0:63] <- undefined([0]*64)
+    dividend[0:XLEN-1] <- (RA)
+    divisor[0:XLEN-1] <- (RB)
+    if (((dividend = (0b1 || ([0b0] * (XLEN-1)))) &
+         (divisor = [1]*XLEN)) |
+         (divisor = [0]*XLEN)) then
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
         overflow <- 1
     else
         RT <- DIVS(dividend, divisor)
@@ -720,22 +720,22 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:127] <- (RA) || [0]*64
-    divisor[0:127] <- EXTS128((RB))
-    if (((dividend = 0x8000_0000_0000_0000_0000_0000_0000_0000) &
-         (divisor = [1]*128)) |
-         (divisor = [0]*128)) then
+    dividend[0:(XLEN*2)-1] <- (RA) || [0]*XLEN
+    divisor[0:(XLEN*2)-1] <- EXTS128((RB))
+    if (((dividend = (0b1 || ([0b0] * ((XLEN*2)-1)))) &
+         (divisor = [1]*(XLEN*2))) |
+         (divisor = [0]*(XLEN*2))) then
         overflow <- 1
     else
         result <- DIVS(dividend, divisor)
-        result64[0:127] <- EXTS128(result[64:127])
-        if (result64 = result) then
-            RT <- result[64:127]
+        result_half[0:(XLEN*2)-1] <- EXTS128(result[XLEN:(XLEN*2)-1])
+        if (result_half = result) then
+            RT <- result[XLEN:(XLEN*2)-1]
             overflow <- 0
         else
             overflow <- 1
     if overflow = 1 then
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
 
 Special Registers Altered:
 
@@ -753,19 +753,19 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:127] <- (RA) || [0]*64
-    divisor[0:127] <- [0]*64 || (RB)
-    if divisor = [0]*128 then
+    dividend[0:(XLEN*2)-1] <- (RA) || [0]*XLEN
+    divisor[0:(XLEN*2)-1] <- [0]*XLEN || (RB)
+    if divisor = [0]*(XLEN*2) then
         overflow <- 1
     else
         result <- dividend / divisor
         if (RA) <u (RB) then
-            RT <- result[64:127]
+            RT <- result[XLEN:(XLEN*2)-1]
             overflow <- 0
         else
             overflow <- 1
     if overflow = 1 then
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
 
 Special Registers Altered:
 
@@ -782,10 +782,10 @@ Pseudo-code:
 
     dividend <- (RA)
     divisor <- (RB)
-    if (((dividend = 0x8000_0000_0000_0000) &
-         (divisor = [1]*64)) |
-         (divisor = [0]*64)) then
-        RT[0:63] <- undefined([0]*64)
+    if (((dividend = (0b1 || ([0b0] * (XLEN-1)))) &
+         (divisor = [1]*XLEN)) |
+         (divisor = [0]*XLEN)) then
+        RT[0:63] <- undefined([0]*XLEN)
         overflow <- 1
     else
         RT <- MODS(dividend, divisor)
@@ -805,8 +805,8 @@ Pseudo-code:
 
     dividend <- (RA)
     divisor <- (RB)
-    if (divisor = [0]*64) then
-        RT[0:63] <- undefined([0]*64)
+    if (divisor = [0]*XLEN) then
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
         overflow <- 1
     else
         RT <- dividend % divisor