bug 1236: add extra argument to svstep: RA.

[openpower-isa.git] / openpower / isa / fixedload.mdwn

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 8bb3da726372be741468d1a1674081e7769812e2..a6c7f9883280619734fd3b938f13d9d576a2fcd3 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -631,7 +631,7 @@ Pseudo-code:
     EA <- b + EXTS(DQ || 0b0000)
     RTp <- MEM(EA, 16)
 
-Description
+Description:
 
     Let the effective address (EA) be the sum (RA|0)+ (DQ||0b0000).
     The quadword in storage addressed by EA is loaded into register pair RTp.