added english language description for lbzsx instruction
[openpower-isa.git] / openpower / isa / fixedlogical.mdwn
index c38dd04dddaef59d3c5165e3ee5e6d3daf7e7521..01eeffb1defc5255faea6b16c52a26e2c3a23bd4 100644 (file)
@@ -453,6 +453,44 @@ Special Registers Altered:
 
     CR0                    (if Rc=1)
 
+# Count Leading Zeros Doubleword under bit Mask
+
+X-Form
+
+* cntlzdm RA,RS,RB
+
+Pseudo-code:
+
+    count <- 0
+    do i = 0 to 63
+        if (RB)[i] = 1 then
+            if (RS)[i] = 1 then leave
+            count <- count + 1
+    RA <- EXTZ64(count)
+
+Special Registers Altered:
+
+    None
+
+# Count Trailing Zeros Doubleword under bit Mask
+
+X-Form
+
+* cnttzdm RA,RS,RB
+
+Pseudo-code:
+
+    count <- 0
+    do i = 0 to 63
+        if (RB)[63-i] = 1 then
+            if (RS)[63-i] = 1 then leave
+            count <- count + 1
+    RA <- EXTZ64(count)
+
+Special Registers Altered:
+
+    None
+
 # Bit Permute Doubleword
 
 X-Form
@@ -474,4 +512,72 @@ Special Registers Altered:
 
     None
 
-<!-- Checked March 2021 -->
+# Centrifuge Doubleword
+
+X-Form
+
+* cfuged RA,RS,RB
+
+Pseudo-code:
+
+    ptr0 <- 0
+    ptr1 <- 0
+    result[0:63] <- 0
+    do i = 0 to 63
+        if (RB)[i] = 0 then
+            result[ptr0] <- (RS)[i]
+            ptr0 <- ptr0 + 1
+        if (RB)[63-i] = 1 then
+            result[63-ptr1] <- (RS)[63-i]
+            ptr1 <- ptr1 + 1
+    RA <- result
+
+Special Registers Altered:
+
+    None
+
+# Parallel Bits Extract Doubleword
+
+X-Form
+
+* pextd RA,RS,RB
+
+Pseudo-code:
+
+    result[0:63] <- 0
+    mask <- (RB)
+    m <- 0
+    k <- 0
+    do while m < 64
+        if (RB)[63-m] = 1 then
+            result[63-k] <- (RS)[63-m]
+            k <- k + 1
+        m <- m + 1
+    RA <- result
+
+Special Registers Altered:
+
+    None
+
+# Parallel Bits Deposit Doubleword
+
+X-Form
+
+* pdepd RA,RS,RB
+
+Pseudo-code:
+
+    result[0:63] <- 0
+    mask <- (RB)
+    m <- 0
+    k <- 0
+    do while m < 64
+        if (RB)[63-m] = 1 then
+            result[63-m] <- (RS)[63-k]
+            k <- k + 1
+        m <- m + 1
+    RA <- result
+
+Special Registers Altered:
+
+    None