added english language description for lbzsx instruction

[openpower-isa.git] / openpower / isa / pifpload.mdwn

diff --git a/openpower/isa/pifpload.mdwn b/openpower/isa/pifpload.mdwn
index 9c65329242ec5382f2fe9ae7331ed060c1a22fe9..d9de3315115dfca2e2ac64a3b2efacd38a797611 100644 (file)
--- a/openpower/isa/pifpload.mdwn
+++ b/openpower/isa/pifpload.mdwn
@@ -2,16 +2,16 @@
 
 <!-- Section 4.6.1 Floating-point storage access instructions. P 140 - 143 -->
 
-# Load Floating-Point Single with Update
+# Load Floating-Point Single with Post-Update
 
 D-Form
 
-* lfsu FRT,D(RA)
+* lfsup FRT,D(RA)
 
 Pseudo-code:
 
     EA <- (RA) + EXTS(D)
-    FRT <- DOUBLE(MEM(EA, 4))
+    FRT <- DOUBLE(MEM(RA, 4))
     RA <- EA
 
 Description:
@@ -31,16 +31,16 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Single with Update Indexed
+# Load Floating-Point Single with Post-Update Indexed
 
 X-Form
 
-* lfsux FRT,RA,RB
+* lfsupx FRT,RA,RB
 
 Pseudo-code:
 
     EA <- (RA) + (RB)
-    FRT <- DOUBLE(MEM(EA, 4))
+    FRT <- DOUBLE(MEM(RA, 4))
     RA <- EA
 
 Description:
@@ -60,16 +60,16 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Double with Update
+# Load Floating-Point Double with Post-Update
 
 D-Form
 
-* lfdu FRT,D(RA)
+* lfdup FRT,D(RA)
 
 Pseudo-code:
 
     EA <- (RA) + EXTS(D)
-    FRT <- MEM(EA, 8)
+    FRT <- MEM(RA, 8)
     RA <- EA
 
 Description:
@@ -87,16 +87,16 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Double with Update Indexed
+# Load Floating-Point Double with Post-Update Indexed
 
 X-Form
 
-* lfdux FRT,RA,RB
+* lfduxp FRT,RA,RB
 
 Pseudo-code:
 
     EA <- (RA) + (RB)
-    FRT <- MEM(EA, 8)
+    FRT <- MEM(RA, 8)
     RA <- EA
 
 Description:
@@ -114,26 +114,3 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point as Integer Word Algebraic Indexed 
-
-X-Form
-
-* lfiwax FRT,RA,RB
-
-Pseudo-code:
-
-    EA <- (RA|0) + (RB)
-    FRT <- EXTS(MEM(EA, 4))
-
-Description:
-
-    Let the effective address (EA) be the sum (RA|0)+(RB).
-
-    The word in storage addressed by EA is loaded into
-    FRT [32:63]. FRT [0:31] are filled with a copy of bit 0 of the
-    loaded word.
-
-Special Registers Altered:
-
-    None
-