overflow condition in dsld and dsrd if RS is non-zero

[openpower-isa.git] / openpower / isa / svfixedarith.mdwn

diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn
index e8232c27e38be9b75373fcd946049fb98884ba3e..6d82b896b440b87e21efc078fe1abd80d4962387 100644 (file)
--- a/openpower/isa/svfixedarith.mdwn
+++ b/openpower/isa/svfixedarith.mdwn
@@ -60,6 +60,9 @@ Pseudo-code:
     mask <- MASK(64, 63-n)
     RT <- (v[0:63] & mask) | ((RC) & ¬mask)
     RS <- v[0:63] & ¬mask
+    overflow = 0
+    if RS != [0]*64:
+        overflow = 1
 
 Special Registers Altered:
 
@@ -79,6 +82,9 @@ Pseudo-code:
     mask <- MASK(n, 63)
     RT <- (v[0:63] & mask) | ((RC) & ¬mask)
     RS <- v[0:63] & ¬mask
+    overflow = 0
+    if RS != [0]*64:
+        overflow = 1
 
 Special Registers Altered: