duplicate RM CSV entries gone after re-run of sv_analysis.py

[openpower-isa.git] / openpower / isatables / minor_19_00000.csv

diff --git a/openpower/isatables/minor_19_00000.csv b/openpower/isatables/minor_19_00000.csv
index 2cf6a79b935fcf9ce602fa5b5f6524ba5cd00d5b..8140fd0f52a8a1a37d18c739f374ae8a9ff7b0d3 100644 (file)
--- a/openpower/isatables/minor_19_00000.csv
+++ b/openpower/isatables/minor_19_00000.csv
@@ -1,2 +1,4 @@
-opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form
-0b00010,ALU,OP_ILLEGAL,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,1,add pcis not implemented yet,DX
+# SPDX-License-Header: CC-BY-4
+# derived from microwatt decode1.vhdl, with thanks and gratitude (IBM, OPF)
+opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form,CONDITIONS
+0b00010,ALU,OP_ILLEGAL,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,1,add pcis not implemented yet,DX,