add ELF reading to coldboot.c, move spi address to 0xf000_000

[ls2.git] / runsimsoc2.sh

diff --git a/runsimsoc2.sh b/runsimsoc2.sh
index 0fa295b4b43a4a4dc3c407aae72d89c28df5dee5..66080cb6cd1d4d3e856b0f6bca9168e40d2f4fc8 100755 (executable)
--- a/runsimsoc2.sh
+++ b/runsimsoc2.sh
@@ -3,10 +3,17 @@ set -e
 
 LIB_DIR=./src/ecp5u
 
-#python3 simsoc.py
+# create the build_simsoc/top.il file with firmware baked-in
+python3 src/ls2.py isim ./coldboot/coldboot.bin
+
+# do some voodoo magic to get icarus to be happy with the ilang file
 yosys simsoc.ys
+
+# fix a bug in Lattice ECP5 models
 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
 patch DDRDLLA.v < DDRDLLA.patch
+
+# string together the icarus verilog files and start runnin
 iverilog -Wall -g2012 -s simsoctb -o simsoc \
         src/simsoctb.v ./top.v dram_model/ddr3.v \
     ${LIB_DIR}/ECLKSYNCB.v ${LIB_DIR}/EHXPLLL.v \
@@ -17,6 +24,10 @@ iverilog -Wall -g2012 -s simsoctb -o simsoc \
        ${LIB_DIR}/DQSBUFM.v ${LIB_DIR}/UDFDL5_UDP_X.v \
     ${LIB_DIR}/TSHX2DQSA.v ${LIB_DIR}/TSHX2DQA.v \
     ${LIB_DIR}/ODDRX2DQSB.v ${LIB_DIR}/IDDRX2DQA.v \
+    ${LIB_DIR}/UDFDL5E_UDP_X.v \
+    ${LIB_DIR}/OBZ.v \
+        ${LIB_DIR}/OFS1P3DX.v \
+        ${LIB_DIR}/IFS1P3DX.v \
     DDRDLLA.v \
        ${LIB_DIR}/CLKDIVF.v
 vvp -n simsoc -fst-speed