platforms/versa_ecp5: import migen changes
[litex.git] / setup.py
index dda177423b51984c7b6b07cf42d5ab585d1106c2..55e4fe7195a5587037a9c72d9d9bcdb7f2426bfe 100755 (executable)
--- a/setup.py
+++ b/setup.py
@@ -5,31 +5,42 @@ from setuptools import setup
 from setuptools import find_packages
 
 
-if sys.version_info[:3] < (3, 3):
-    raise SystemExit("You need Python 3.3+")
+if sys.version_info[:3] < (3, 5):
+    raise SystemExit("You need Python 3.5+")
 
 
 setup(
-    name="migen",
-    version="0.2",
-    description="Python toolbox for building complex digital hardware",
-    long_description=open("README.rst").read(),
-    author="Sebastien Bourdeauducq",
-    author_email="sb@m-labs.hk",
-    url="http://m-labs.hk",
-    download_url="https://github.com/m-labs/migen",
-    packages=find_packages(),
-    test_suite="migen.test",
+    name="litex",
+    version="0.2.dev",
+    description="Python tools to design FPGA cores and SoCs",
+    long_description=open("README").read(),
+    author="Florent Kermarrec",
+    author_email="florent@enjoy-digital.fr",
+    url="http://enjoy-digital.fr",
+    download_url="https://github.com/enjoy-digital/litex",
+    test_suite="test",
     license="BSD",
     platforms=["Any"],
     keywords="HDL ASIC FPGA hardware design",
     classifiers=[
         "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
         "Environment :: Console",
-        "Development Status :: Beta",
+        "Development Status :: Alpha",
         "Intended Audience :: Developers",
         "License :: OSI Approved :: BSD License",
         "Operating System :: OS Independent",
         "Programming Language :: Python",
     ],
+    packages=find_packages(exclude=("test*", "sim*", "doc*")),
+    install_requires=["pyserial"],
+    include_package_data=True,
+    entry_points={
+        "console_scripts": [
+            "mkmscimg=litex.soc.tools.mkmscimg:main",
+            "litex_term=litex.soc.tools.litex_term:main",
+            "litex_server=litex.soc.tools.remote.litex_server:main",
+            "litex_sim=litex.boards.targets.sim:main",
+            "litex_simple=litex.boards.targets.simple:main",
+        ],
+    },
 )