use brackets round (XLEN/2) in divw pseudocode

[openpower-isa.git] / setup.py

diff --git a/setup.py b/setup.py
index 470686e2ed7ae56b79c1d09b50a97ea1c507089d..5de8b0c4be0e5a8b9a3be2955d4636ee64d6cecd 100644 (file)
--- a/setup.py
+++ b/setup.py
@@ -6,7 +6,7 @@ here = os.path.abspath(os.path.dirname(__file__))
 README = open(os.path.join(here, 'README.md')).read()
 NEWS = open(os.path.join(here, 'NEWS.txt')).read()
 
-version = '0.0.1'
+version = '0.0.3'
 
 # using pip3 for ongoing development is a royal pain.  seriously not
 # recommended.  therefore a number of these dependencies have been
@@ -59,7 +59,10 @@ setup(
     entry_points = {
         'console_scripts': [
             'pywriter=openpower.decoder.pseudo.pywriter:pywriter',
-            'sv_analysis=openpower.sv.sv_analysis:process_csvs'
+            'pyfnwriter=openpower.decoder.pseudo.pyfnwriter:pyfnwriter',
+            'sv_analysis=openpower.sv.sv_analysis:process_csvs',
+            'pypowersim=openpower.decoder.isa.pypowersim:run_simulation',
+            'pysvp64asm=openpower.sv.trans.svp64:asm_process'
         ]
     }
 )