com/liteethmini/phy: remove use of FlipFlop in MII

[litex.git] / setup.py

diff --git a/setup.py b/setup.py
index 0f84b94587a1117d486bd89b8e3cd894f68d52f5..645267a19b69928b367cba50cd45d3c3e4c4a331 100644 (file)
--- a/setup.py
+++ b/setup.py
@@ -1,6 +1,7 @@
 #!/usr/bin/env python3
 
-import sys, os
+import sys
+import os
 from setuptools import setup
 from setuptools import find_packages
 
@@ -9,29 +10,29 @@ README = open(os.path.join(here, "README")).read()
 
 required_version = (3, 3)
 if sys.version_info < required_version:
-       raise SystemExit("LiteEth requires python {0} or greater".format(
-               ".".join(map(str, required_version))))
+    raise SystemExit("MiSoC requires python {0} or greater".format(
+        ".".join(map(str, required_version))))
 
 setup(
-       name="liteeth",
-       version="unknown",
-       description="small footprint and configurable Ethernet core",
-       long_description=README,
-       author="Florent Kermarrec",
-       author_email="florent@enjoy-digital.fr",
-       url="http://enjoy-digital.fr",
-       download_url="https://github.com/enjoy-digital/liteeth",
-       packages=find_packages(here),
-       license="GPL",
-       platforms=["Any"],
-       keywords="HDL ASIC FPGA hardware design",
-       classifiers=[
-               "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
-               "Environment :: Console",
-               "Development Status :: Alpha",
-               "Intended Audience :: Developers",
-               "License :: OSI Approved :: GNU General Public License (GPL)",
-               "Operating System :: OS Independent",
-               "Programming Language :: Python",
-       ],
+    name="misoclib",
+    version="unknown",
+    description="a high performance and small footprint SoC based on Migen",
+    long_description=README,
+    author="Sebastien Bourdeauducq",
+    author_email="sb@m-labs.hk",
+    url="http://m-labs.hk",
+    download_url="https://github.com/m-labs/misoc",
+    packages=find_packages(here),
+    license="BSD",
+    platforms=["Any"],
+    keywords="HDL ASIC FPGA hardware design",
+    classifiers=[
+        "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
+        "Environment :: Console",
+        "Development Status :: Alpha",
+        "Intended Audience :: Developers",
+        "License :: OSI Approved :: BSD License",
+        "Operating System :: OS Independent",
+        "Programming Language :: Python",
+    ],
 )