whoops iocell_side interface in wrong template
[pinmux.git] / src / bsv / bsv_lib / slow_peripherals_template.bsv
index f03e6187a296ba6bd9022e4ac2ebb9c556400b61..1eece87e99e2b18048b30d8990dbc9b4c66be1c6 100644 (file)
@@ -7,17 +7,14 @@ package slow_peripherals;
        import AXI4_Types::*;
        import Semi_FIFOF::*;
        import AXI4Lite_AXI4_Bridge::*;
+       import slow_memory_map::*;
        `include "instance_defines.bsv"
-    /* ==== define the AXI Addresses ==== */
-{2}
     /* ==== define the number of slow peripheral irqs ==== */
 {11}
-    /*====== AXI4 Lite slave declarations =======*/
-
-{3}
        /*===========================*/
        /*=== package imports ===*/
        import Clocks::*;
+       import ifc_sync:: *;
        import GetPut::*;
        import ClientServer::*;
        import Connectable::*;
@@ -35,9 +32,6 @@ package slow_peripherals;
        `ifdef AXIEXP
                import axiexpansion     ::*;
        `endif
-       `ifdef QSPI 
-               import qspi                              :: *; 
-       `endif
        /*=====================================*/
        
        /*===== interface declaration =====*/
@@ -48,14 +42,15 @@ package slow_peripherals;
                `endif
        endinterface
        interface Ifc_slow_peripherals;
-               interface AXI4_Slave_IFC#(`ADDR,`DATA,`USERSPACE) axi_slave;
+               interface AXI4_Slave_IFC#(`PADDR,`DATA,`USERSPACE) axi_slave;
                interface SP_dedicated_ios slow_ios;
                `ifdef CLINT
                        method Bit#(1) msip_int;
                        method Bit#(1) mtip_int;
                        method Bit#(`DATA) mtime;
                `endif
-               `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
+               `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note;
+        `endif
         interface IOCellSide iocell_side; // mandatory interface
         `ifdef PLIC
 {1}
@@ -63,27 +58,6 @@ package slow_peripherals;
        endinterface
        /*================================*/
 
-       function Tuple2#(Bool, Bit#(TLog#(Num_Slow_Slaves)))
-                     fn_address_mapping (Bit#(`ADDR) addr);
-        `ifdef CLINT
-            if(addr>=`ClintBase && addr<=`ClintEnd)
-                return tuple2(True,fromInteger(valueOf(CLINT_slave_num)));
-            else
-        `endif
-        `ifdef PLIC
-            if(addr>=`PLICBase && addr<=`PLICEnd)
-                return tuple2(True,fromInteger(valueOf(Plic_slave_num)));
-            else
-        `endif
-        `ifdef AXIEXP
-            if(addr>=`AxiExp1Base && addr<=`AxiExp1End)
-                return tuple2(True,fromInteger(valueOf(AxiExp1_slave_num)));
-            else
-        `endif
-{4}
-        return tuple2(False,?);
-       endfunction
-
        (*synthesize*)
        module mkslow_peripherals#(Clock fast_clock, Reset fast_reset,
                                Clock uart_clock, Reset uart_reset
@@ -107,15 +81,16 @@ package slow_peripherals;
                        Ifc_AxiExpansion axiexp1 <- mkAxiExpansion();   
                `endif
         Ifc_pinmux pinmux <- mkpinmux; // mandatory
+{14}
 
                /*=======================================================*/
 
-           AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `ADDR, `DATA,`USERSPACE)
-                slow_fabric <- mkAXI4_Lite_Fabric(fn_address_mapping);
+           AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `PADDR, `DATA,`USERSPACE)
+                slow_fabric <- mkAXI4_Lite_Fabric(fn_slow_address_mapping);
                Ifc_AXI4Lite_AXI4_Bridge
                 bridge<-mkAXI4Lite_AXI4_Bridge(fast_clock,fast_reset);
        
-               mkConnection (bridge.axi4_lite_master,  slow_fabric.v_from_masters [0]);
+               mkConnection (bridge.axi4_lite_master, slow_fabric.v_from_masters [0]);
                /*======= Slave connections to AXI4Lite fabric =========*/
 {6}
                `ifdef CLINT
@@ -218,8 +193,8 @@ package slow_peripherals;
        */
                endinterface
         interface iocell_side=pinmux.iocell_side;
-        interface pad_config0= gpioa.pad_config;
 {9}
+{13}
                /*===================================*/
        endmodule
 endpackage