`include "instance_defines.bsv"
/* ==== define the AXI Addresses ==== */
{2}
+ /* ==== define the number of slow peripheral irqs ==== */
+{11}
/*====== AXI4 Lite slave declarations =======*/
{3}
/*=====================================*/
/*===== interface declaration =====*/
- interface SP_ios;
-{1}
+ interface SP_dedicated_ios;
`ifdef AXIEXP
interface Get#(Bit#(67)) axiexp1_out;
interface Put#(Bit#(67)) axiexp1_in;
endinterface
interface Ifc_slow_peripherals;
interface AXI4_Slave_IFC#(`ADDR,`DATA,`USERSPACE) axi_slave;
- interface SP_ios slow_ios;
- method Action external_int(Bit#(32) in);
+ interface SP_dedicated_ios slow_ios;
`ifdef CLINT
method Bit#(1) msip_int;
method Bit#(1) mtip_int;
`endif
`ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
interface IOCellSide iocell_side; // mandatory interface
+{1}
endinterface
/*================================*/
`ifdef PLIC
Ifc_PLIC_AXI plic <- mkplicperipheral();
Wire#(Bit#(TLog#(`INTERRUPT_PINS))) interrupt_id <- mkWire();
- Vector#(32, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
+ Vector#(`INTERRUPT_PINS, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
`endif
`ifdef AXIEXP
Ifc_AxiExpansion axiexp1 <- mkAxiExpansion();
`endif
Ifc_pinmux pinmux <- mkpinmux; // mandatory
- Wire#(Bit#(32)) wr_interrupt <- mkWire();
/*=======================================================*/
AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `ADDR, `DATA,`USERSPACE)
/*========== pinmux connections ============*/
{7}
{8}
- for(Integer i=0;i<32;i=i+ 1)begin
- rule connect_int_to_plic(wr_interrupt[i]==1);
- ff_gateway_queue[i].enq(1);
- plic.ifc_external_irq[i].irq_frm_gateway(True);
- endrule
- end
+
+ /*=================== PLIC Connections ==================== */
+{10}
+
rule rl_completion_msg_from_plic;
- let id <- plic.intrpt_completion;
+ let id <- plic.intrpt_completion;
interrupt_id <= id;
- `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
- endrule
+ `ifdef verbose
+ $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id);
+ `endif
+ endrule
- for(Integer i=0; i <32; i=i+1) begin
+ for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
rule deq_gateway_queue;
if(interrupt_id==fromInteger(i)) begin
ff_gateway_queue[i].deq;
- `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
+ `ifdef verbose
+ $display($time,"Dequeing the Interrupt request for ID: %d",i);
+ `endif
end
endrule
end
- /* for connectin inputs from pinmux as itnerrupts
- rule connect_pinmux_eint;
- wr_interrupt<= pinmux.peripheral_side.eint_input;
- endrule
- */
- // NEEL EDIT OVER
- /*=======================================================*/
- /*=================== PLIC Connections ==================== */
`ifdef PLIC_main
- /*TODO DMA interrupt need to be connected to the plic
+ /*TODO DMA interrupt need to be connected to the plic */
for(Integer i=1; i<8; i=i+1) begin
`ifdef DMA
rule rl_connect_dma_interrupts_to_plic;
endrule
`endif
end
- */
- rule rl_connect_i2c0_to_plic;
- `ifdef I2C0
- if(i2c0.isint()==1'b1) begin
- ff_gateway_queue[8].enq(1);
- plic.ifc_external_irq[8].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[8].enq(0);
- `endif
- endrule
-
- rule rl_connect_i2c1_to_plic;
- `ifdef I2C1
- if(i2c1.isint()==1'b1) begin
- ff_gateway_queue[9].enq(1);
- plic.ifc_external_irq[9].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[9].enq(0);
- `endif
- endrule
-
- rule rl_connect_i2c0_timerint_to_plic;
- `ifdef I2C0
- if(i2c0.timerint()==1'b1) begin
- ff_gateway_queue[10].enq(1);
- plic.ifc_external_irq[10].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[10].enq(0);
- `endif
- endrule
-
- rule rl_connect_i2c1_timerint_to_plic;
- `ifdef I2C1
- if(i2c1.timerint()==1'b1) begin
- ff_gateway_queue[11].enq(1);
- plic.ifc_external_irq[11].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[11].enq(0);
- `endif
- endrule
-
- rule rl_connect_i2c0_isber_to_plic;
- `ifdef I2C0
- if(i2c0.isber()==1'b1) begin
- ff_gateway_queue[12].enq(1);
- plic.ifc_external_irq[12].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[12].enq(0);
- `endif
- endrule
-
- rule rl_connect_i2c1_isber_to_plic;
- `ifdef I2C1
- if(i2c1.isber()==1'b1) begin
- ff_gateway_queue[13].enq(1);
- plic.ifc_external_irq[13].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[13].enq(0);
- `endif
- endrule
-
- for(Integer i = 14; i < 20; i=i+1) begin
- rule rl_connect_qspi0_to_plic;
- `ifdef QSPI0
- if(qspi0.interrupts()[i-14]==1'b1) begin
- ff_gateway_queue[i].enq(1);
- plic.ifc_external_irq[i].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[i].enq(0);
- `endif
- endrule
- end
-
- for(Integer i = 20; i<26; i=i+1) begin
- rule rl_connect_qspi1_to_plic;
- `ifdef QSPI1
- if(qspi1.interrupts()[i-20]==1'b1) begin
- ff_gateway_queue[i].enq(1);
- plic.ifc_external_irq[i].irq_frm_gateway(True);
- end
- `else
- ff_gateway_queue[i].enq(0);
- `endif
- endrule
- end
-
- `ifdef UART0
- SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset);
- rule synchronize_the_uart0_interrupt;
- uart0_interrupt.send(uart0.irq);
- endrule
- `endif
- rule rl_connect_uart_to_plic;
- `ifdef UART0
- if(uart0_interrupt.read==1'b1) begin
- ff_gateway_queue[27].enq(1);
- plic.ifc_external_irq[27].irq_frm_gateway(True);
- end
-
- `else
- ff_gateway_queue[27].enq(0);
- `endif
- endrule
-
- for(Integer i = 28; i<`INTERRUPT_PINS; i=i+1) begin
- rule rl_raise_interrupts;
- if((i-28)<`IONum) begin //Peripheral interrupts
- if(gpio.to_plic[i-28]==1'b1) begin
- plic.ifc_external_irq[i].irq_frm_gateway(True);
- ff_gateway_queue[i].enq(1);
- end
- end
- endrule
- end
-
- rule rl_completion_msg_from_plic;
- let id <- plic.intrpt_completion;
- interrupt_id <= id;
- `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
- endrule
-
- for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
- rule deq_gateway_queue;
- if(interrupt_id==fromInteger(i)) begin
- ff_gateway_queue[i].deq;
- `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
- end
- endrule
- end
-
`endif
/*======================================================= */
`ifdef QSPI0 method qspi0_isint=qspi0.interrupts[5]; `endif
`ifdef QSPI1 method qspi1_isint=qspi1.interrupts[5]; `endif
`ifdef UART0 method uart0_intr=uart0.irq; `endif
- interface SP_ios slow_ios;
+ interface SP_dedicated_ios slow_ios;
/* template for dedicated peripherals
`ifdef UART0
interface uart0_coe=uart0.coe_rs232;
endinterface
// NEEL EDIT
interface iocell_side=pinmux.iocell_side;
- interface pad_configa= gpioa.pad_config;
- method Action external_int(Bit#(32) in);
- wr_interrupt<= in;
- endmethod
+ interface pad_config0= gpioa.pad_config;
+{9}
// NEEL EDIT OVER
/*===================================*/
endmodule