split out slow memory map to separate file
[pinmux.git] / src / bsv / bsv_lib / slow_peripherals_template.bsv
index de2aaf921f8db990f7480317117afec841c2cf5a..636197e77c2fd43d9372170ba1d323e26cd4bd7d 100644 (file)
@@ -7,14 +7,10 @@ package slow_peripherals;
        import AXI4_Types::*;
        import Semi_FIFOF::*;
        import AXI4Lite_AXI4_Bridge::*;
+       import slow_memory_map::*;
        `include "instance_defines.bsv"
-    /* ==== define the AXI Addresses ==== */
-{2}
     /* ==== define the number of slow peripheral irqs ==== */
 {11}
-    /*====== AXI4 Lite slave declarations =======*/
-
-{3}
        /*===========================*/
        /*=== package imports ===*/
        import Clocks::*;
@@ -61,27 +57,6 @@ package slow_peripherals;
        endinterface
        /*================================*/
 
-       function SlowTuple2#(Bool, Bit#(TLog#(Num_Slow_Slaves)))
-                     fn_address_mapping (Bit#(`ADDR) addr);
-        `ifdef CLINT
-            if(addr>=`ClintBase && addr<=`ClintEnd)
-                return tuple2(True,fromInteger(valueOf(CLINT_slave_num)));
-            else
-        `endif
-        `ifdef PLIC
-            if(addr>=`PLICBase && addr<=`PLICEnd)
-                return tuple2(True,fromInteger(valueOf(Plic_slave_num)));
-            else
-        `endif
-        `ifdef AXIEXP
-            if(addr>=`AxiExp1Base && addr<=`AxiExp1End)
-                return tuple2(True,fromInteger(valueOf(AxiExp1_slave_num)));
-            else
-        `endif
-{4}
-        return tuple2(False,?);
-       endfunction
-
        (*synthesize*)
        module mkslow_peripherals#(Clock fast_clock, Reset fast_reset,
                                Clock uart_clock, Reset uart_reset