`ifdef AXIEXP
import axiexpansion ::*;
`endif
+ `ifdef QSPI
+ import qspi :: *;
+ `endif
/*=====================================*/
/*===== interface declaration =====*/
- interface SP_ios;
-{1}
+ interface SP_dedicated_ios;
`ifdef AXIEXP
interface Get#(Bit#(67)) axiexp1_out;
interface Put#(Bit#(67)) axiexp1_in;
`endif
endinterface
interface Ifc_slow_peripherals;
- interface AXI4_Slave_IFC#(`PADDR,`Reg_width,`USERSPACE) axi_slave;
- interface SP_ios slow_ios;
- method Action external_int(Bit#(32) in);
+ interface AXI4_Slave_IFC#(`ADDR,`DATA,`USERSPACE) axi_slave;
+ interface SP_dedicated_ios slow_ios;
`ifdef CLINT
method Bit#(1) msip_int;
method Bit#(1) mtip_int;
- method Bit#(`Reg_width) mtime;
+ method Bit#(`DATA) mtime;
`endif
`ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
interface IOCellSide iocell_side; // mandatory interface
+{1}
endinterface
/*================================*/
function Tuple2#(Bool, Bit#(TLog#(Num_Slow_Slaves)))
- fn_address_mapping (Bit#(`PADDR) addr);
+ fn_address_mapping (Bit#(`ADDR) addr);
`ifdef CLINT
if(addr>=`ClintBase && addr<=`ClintEnd)
return tuple2(True,fromInteger(valueOf(CLINT_slave_num)));
(*synthesize*)
module mkslow_peripherals#(Clock fast_clock, Reset fast_reset,
Clock uart_clock, Reset uart_reset
- `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif
+ `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif
)(Ifc_slow_peripherals);
Clock sp_clock <-exposeCurrentClock; // slow peripheral clock
Reset sp_reset <-exposeCurrentReset; // slow peripheral reset
Ifc_AxiExpansion axiexp1 <- mkAxiExpansion();
`endif
Ifc_pinmux pinmux <- mkpinmux; // mandatory
- Wire#(Bit#(32)) wr_interrupt <- mkWire();
/*=======================================================*/
- AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `PADDR, `Reg_width,`USERSPACE)
+ AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `ADDR, `DATA,`USERSPACE)
slow_fabric <- mkAXI4_Lite_Fabric(fn_address_mapping);
Ifc_AXI4Lite_AXI4_Bridge
bridge<-mkAXI4Lite_AXI4_Bridge(fast_clock,fast_reset);
/*======= Slave connections to AXI4Lite fabric =========*/
{6}
`ifdef CLINT
- mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(CLINT_slave_num))],
+ mkConnection (slow_fabric.v_to_slaves
+ [fromInteger(valueOf(CLINT_slave_num))],
clint.axi4_slave);
`endif
`ifdef PLIC
- mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Plic_slave_num))],
+ mkConnection (slow_fabric.v_to_slaves
+ [fromInteger(valueOf(Plic_slave_num))],
plic.axi4_slave_plic); //
`endif
`ifdef AXIEXP
- mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(AxiExp1_slave_num))],
+ mkConnection (slow_fabric.v_to_slaves
+ [fromInteger(valueOf(AxiExp1_slave_num))],
axiexp1.axi_slave); //
`endif
- // NEEL EDIT
- mkConnection (slow_fabric.
- v_to_slaves[fromInteger(valueOf(Muxa_slave_num))],
- muxa.axi_slave);
- mkConnection (slow_fabric.
- v_to_slaves[fromInteger(valueOf(Gpioa_slave_num))],
- gpioa.axi_slave);
- rule connect_select_lines_pinmux;// mandatory
- pinmux.mux_lines.cell0_mux(muxa.mux_config.mux[0]);
- pinmux.mux_lines.cell1_mux(muxa.mux_config.mux[1]);
- pinmux.mux_lines.cell2_mux(muxa.mux_config.mux[2]);
- endrule
- rule connect_i2c0_scl;
- pinmux.peripheral_side.twi_scl_out(i2c0.out.scl_out);
- pinmux.peripheral_side.twi_scl_outen(pack(i2c0.out.scl_out_en));
- endrule
- rule connect_i2c0_scl_in;
- i2c0.out.scl_in(pinmux.peripheral_side.twi_scl_in);
- endrule
- rule connect_i2c0_sda;
- pinmux.peripheral_side.twi_sda_out(i2c0.out.sda_out);
- pinmux.peripheral_side.twi_sda_outen(pack(i2c0.out.sda_out_en));
- endrule
- rule connect_i2c0_sda_in;
- i2c0.out.sda_in(pinmux.peripheral_side.twi_sda_in);
- endrule
- rule connect_uart1tx;
- pinmux.peripheral_side.uart_tx(uart1.coe_rs232.sout);
- endrule
- rule connect_uart1rx;
- uart1.coe_rs232.sin(pinmux.peripheral_side.uart_rx);
- endrule
- rule connect_gpioa;
- pinmux.peripheral_side.gpioa_a0_out(gpioa.func.gpio_out[0]);
- pinmux.peripheral_side.gpioa_a0_outen(gpioa.func.gpio_out_en[0]);
- pinmux.peripheral_side.gpioa_a1_out(gpioa.func.gpio_out[1]);
- pinmux.peripheral_side.gpioa_a1_outen(gpioa.func.gpio_out_en[1]);
- pinmux.peripheral_side.gpioa_a2_out(gpioa.func.gpio_out[2]);
- pinmux.peripheral_side.gpioa_a2_outen(gpioa.func.gpio_out_en[2]);
- Vector#(3,Bit#(1)) temp;
- temp[0]=pinmux.peripheral_side.gpioa_a0_in;
- temp[1]=pinmux.peripheral_side.gpioa_a1_in;
- temp[2]=pinmux.peripheral_side.gpioa_a2_in;
- gpioa.func.gpio_in(temp);
- endrule
- for(Integer i=0;i<32;i=i+ 1)begin
- rule connect_int_to_plic(wr_interrupt[i]==1);
- ff_gateway_queue[i].enq(1);
- plic.ifc_external_irq[i].irq_frm_gateway(True);
- endrule
- end
+ /*========== pinmux connections ============*/
+{7}
+{8}
rule rl_completion_msg_from_plic;
let id <- plic.intrpt_completion;
interrupt_id <= id;
end
`ifdef UART0
- SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset);
+ SyncBitIfc#(Bit#(1)) uart0_interrupt <-
+ mkSyncBitToCC(sp_clock, uart_reset);
rule synchronize_the_uart0_interrupt;
uart0_interrupt.send(uart0.irq);
endrule
`ifdef QSPI0 method qspi0_isint=qspi0.interrupts[5]; `endif
`ifdef QSPI1 method qspi1_isint=qspi1.interrupts[5]; `endif
`ifdef UART0 method uart0_intr=uart0.irq; `endif
- interface SP_ios slow_ios;
+ interface SP_dedicated_ios slow_ios;
+/* template for dedicated peripherals
`ifdef UART0
interface uart0_coe=uart0.coe_rs232;
`endif
`ifdef PWM_AXI4Lite
interface pwm_o = pwm_bus.pwm_io;
`endif
+*/
endinterface
// NEEL EDIT
interface iocell_side=pinmux.iocell_side;
- interface pad_configa= gpioa.pad_config;
- method Action external_int(Bit#(32) in);
- wr_interrupt<= in;
- endmethod
+ interface pad_config0= gpioa.pad_config;
+{9}
// NEEL EDIT OVER
/*===================================*/
endmodule
projects / pinmux.git / blobdiff