numsloirqs = ifaces.mk_sloirqsdef()
ifacedef = ifaces.mk_ext_ifacedef()
ifacedef = ifaces.mk_ext_ifacedef()
+ clockcon = ifaces.mk_slowclk_con()
with open(slow, "w") as bsv_file:
with open(slowt) as f:
fnaddrmap, mkslow, mkcon, mkcellcon,
pincon, inst, mkplic,
numsloirqs, ifacedef,
- inst2))
+ inst2, clockcon))
with open(slowmf, "w") as bsv_file:
with open(slowmt) as f:
fnaddrmap = ifaces.axi_fastaddr_map()
mkfast = ifaces.mkfast_peripheral()
mkcon = ifaces.mk_fast_connection()
+ mkmstcon = ifaces.mk_master_connection()
mkcellcon = ifaces.mk_cellconn()
- pincon = ifaces.mk_pincon()
+ pincon = ifaces.mk_fast_pincon()
inst = ifaces.extfastifinstance()
mkplic = ifaces.mk_plic()
numsloirqs = ifaces.mk_sloirqsdef()
ifacedef = ifaces.mk_ext_ifacedef()
dma = ifaces.mk_dma_irq()
num_dmachannels = ifaces.num_dmachannels()
+ clockcon = ifaces.mk_fastclk_con()
with open(soc, "w") as bsv_file:
with open(soct) as f:
slavedecl, mastdecl, mkcon,
inst, dma, num_dmachannels,
pincon, regdef, fnaddrmap,
+ clockcon, mkmstcon,
))
with open(fastmf, "w") as bsv_file:
with open(idef, 'w') as bsv_file:
txt = '''\
`define ADDR {0}
-`define PADDR {0}
+`define PADDR {2}
`define DATA {1}
`define Reg_width {1}
`define USERSPACE 0
-//`define RV64
+`define RV64
// TODO: work out if these are needed
`define PWM_AXI4Lite
`define BAUD_RATE 5 //130 //
`endif
'''
- bsv_file.write(txt.format(p.ADDR_WIDTH, p.DATA_WIDTH))
+ bsv_file.write(txt.format(p.ADDR_WIDTH,
+ p.DATA_WIDTH,
+ p.PADDR_WIDTH))