absolute import again

[openpower-isa.git] / src / openpower / decoder / decode2execute1.py

diff --git a/src/openpower/decoder/decode2execute1.py b/src/openpower/decoder/decode2execute1.py
index 3e264aabd52d0901d8b7b72544207a23e29258d9..e7deff5b2608cc69769eb321ac1d621a3001ffc7 100644 (file)
--- a/src/openpower/decoder/decode2execute1.py
+++ b/src/openpower/decoder/decode2execute1.py
@@ -9,6 +9,10 @@ from openpower.decoder.power_enums import (MicrOp, CryIn, Function,
                                      SPRfull, SPRreduced, LDSTMode)
 from openpower.consts import TT
 from openpower.exceptions import LDSTException
+from openpower.decoder.power_svp64_rm import sv_input_record_layout
+from openpower.decoder.power_enums import asmlen
+
+from openpower.util import log
 
 
 class Data(Record):
@@ -37,12 +41,13 @@ class IssuerDecode2ToOperand(RecordObject):
 
     def __init__(self, name=None):
 
-        RecordObject.__init__(self, name=name)
+        RecordObject.__init__(self, layout=sv_input_record_layout,
+                                    name=name)
 
         # current "state" (TODO: this in its own Record)
         self.msr = Signal(64, reset_less=True)
         self.cia = Signal(64, reset_less=True)
-        self.svstate = Signal(32, reset_less=True)
+        self.svstate = Signal(64, reset_less=True)
 
         # instruction, type and decoded information
         self.insn = Signal(32, reset_less=True) # original instruction
@@ -52,6 +57,7 @@ class IssuerDecode2ToOperand(RecordObject):
         self.rc = Data(1, "rc")
         self.oe = Data(1, "oe")
         self.input_carry = Signal(CryIn, reset_less=True)
+        self.output_carry = Signal(reset_less=True)
         self.traptype  = Signal(TT.size, reset_less=True) # trap main_stage.py
         self.ldst_exc  = LDSTException("exc")
         self.trapaddr  = Signal(13, reset_less=True)
@@ -99,7 +105,7 @@ class Decode2ToExecute1Type(RecordObject):
         RecordObject.__init__(self, name=name)
 
         if asmcode:
-            self.asmcode = Signal(8, reset_less=True) # only for simulator
+            self.asmcode = Signal(asmlen, reset_less=True) # only for simulator
         self.write_reg = Data(7, name="rego")
         self.write_ea = Data(7, name="ea") # for LD/ST in update mode
         self.read_reg1 = Data(7, name="reg1")
@@ -122,11 +128,11 @@ class Decode2ToExecute1Type(RecordObject):
 
         self.read_cr1 = Data(7, name="cr_in1")
         self.read_cr2 = Data(7, name="cr_in2")
-        self.read_cr3 = Data(7, name="cr_in2")
+        self.read_cr3 = Data(7, name="cr_in3")
         self.write_cr = Data(7, name="cr_out")
 
         # decode operand data
-        print ("decode2execute init", name, opkls, do)
+        log ("decode2execute init", name, opkls, do)
         #assert name is not None, str(opkls)
         if do is not None:
             self.do = do