test_caller_bcd: fix and refactor addg6s test loop

[openpower-isa.git] / src / openpower / decoder / helpers.py

diff --git a/src/openpower/decoder/helpers.py b/src/openpower/decoder/helpers.py
index b219767cebe0726237a5e5fee422049b1593d2ec..87b71d99780046a7643d9cd828779eb53e737bf4 100644 (file)
--- a/src/openpower/decoder/helpers.py
+++ b/src/openpower/decoder/helpers.py
@@ -9,6 +9,7 @@ from openpower.decoder.selectable_int import selectgtu as gtu
 from openpower.decoder.selectable_int import check_extsign
 
 from openpower.util import log
+import math
 
 trunc_div = floordiv
 trunc_rem = mod
@@ -160,56 +161,6 @@ def undefined(v):
     """
     return v
 
-def DOUBLE(WORD):
-    """convert incoming WORD to double.  v3.0B p140 section 4.6.2
-    """
-    # result, FRT, start off all zeros
-    log ("WORD", WORD)
-    FRT = SelectableInt(0, 64)
-    z1 = SelectableInt(0, 1)
-    z29 = SelectableInt(0, 29)
-    e = WORD[1:9]
-    m = WORD[9:32]
-    s = WORD[0]
-    log ("word s e m", s, e, m)
-
-    # Normalized Operand
-    if e.value > 0 and e.value  < 255:
-        log ("normalised")
-        FRT[0:2] = WORD[0:2]
-        FRT[2] = ~WORD[1]
-        FRT[3] = ~WORD[1]
-        FRT[4] = ~WORD[1]
-        FRT[5:64] = selectconcat(WORD[2:32], z29)
-
-        # Denormalized Operand
-        if e.value  == 0 and m.value != 0:
-            log ("denormalised")
-            sign = WORD[0]
-            exp = -126
-            frac = selectconcat(z1, WORD[9:32], z29)
-            # normalize the operand
-            while frac[0].value  == 0:
-                frac[0:53] = selectconcat(frac[1:53], z1)
-                exp = exp - 1
-            FRT[0] = sign
-            FRT[1:12] = exp + 1023
-            FRT[12:64] = frac[1:53]
-
-    # Zero / Infinity / NaN
-    if e.value  == 255 or WORD[1:32].value  == 0:
-        log ("z/inf/nan")
-        FRT[0:2] = WORD[0:2]
-        FRT[2] = WORD[1]
-        FRT[3] = WORD[1]
-        FRT[4] = WORD[1]
-        FRT[5:64] = selectconcat(WORD[2:32], z29)
-
-    log ("Double s e m", FRT[0].value, FRT[1:12].value-1023,
-                           FRT[12:64].value)
-
-    return FRT
-
 
 def SINGLE(FRS):
     """convert incoming FRS into 32-bit word.  v3.0B p144 section 4.6.3
@@ -260,6 +211,26 @@ def fp64toselectable(frt):
     return SelectableInt(val, 64)
 
 
+def FPSIN32(FRB):
+    from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
+    #FRB = DOUBLE(SINGLE(FRB))
+    result = math.sin(float(FRB))
+    cvt = fp64toselectable(result)
+    cvt = DOUBLE2SINGLE(cvt)
+    log ("FPSIN32", FRB, float(FRB), "=", result, cvt)
+    return cvt
+
+
+def FPCOS32(FRB):
+    from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
+    #FRB = DOUBLE(SINGLE(FRB))
+    result = math.cos(float(FRB))
+    cvt = fp64toselectable(result)
+    cvt = DOUBLE2SINGLE(cvt)
+    log ("FPCOS32", FRB, float(FRB), "=", result, cvt)
+    return cvt
+
+
 def FPADD32(FRA, FRB):
     from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
     #return FPADD64(FRA, FRB)
@@ -268,7 +239,7 @@ def FPADD32(FRA, FRB):
     result = float(FRA) + float(FRB)
     cvt = fp64toselectable(result)
     cvt = DOUBLE2SINGLE(cvt)
-    log ("FPADD32", FRA, FRB, result, cvt)
+    log ("FPADD32", FRA, FRB, float(FRA), "+", float(FRB), "=", result, cvt)
     return cvt
 
 
@@ -280,7 +251,7 @@ def FPSUB32(FRA, FRB):
     result = float(FRA) - float(FRB)
     cvt = fp64toselectable(result)
     cvt = DOUBLE2SINGLE(cvt)
-    log ("FPSUB32", FRA, FRB, result, cvt)
+    log ("FPSUB32", FRA, FRB, float(FRA), "-", float(FRB), "=", result, cvt)
     return cvt
 
 
@@ -295,6 +266,7 @@ def signinv(res, sign):
 
 def FPMUL32(FRA, FRB, sign=1):
     from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
+    from openpower.decoder.isafunctions.double2single import DOUBLE
     #return FPMUL64(FRA, FRB)
     FRA = DOUBLE(SINGLE(FRA))
     FRB = DOUBLE(SINGLE(FRB))