no python files to be committed in isafunctions
[openpower-isa.git] / src / openpower / decoder / isa / pypowersim.py
index 4c3242bf8e0f2c9a0b1e3e8c5358b58133175f5f..cb7964fc84384acb429972eb839f7751a2022ba7 100644 (file)
@@ -149,6 +149,12 @@ def run_tst(args, generator, qemu,
                 initial_regs=initial_regs, initial_fprs=initial_fprs)
         for reg, val in qemu._get_registers().items():
             log ("qemu reg", reg, hex(val))
+        if True:
+            offs, length = 0x200000, 0x200
+            qmem = qemu.get_mem(offs, length)
+            log("qemu mem pre-dump", hex(offs), length)
+            for i, data in enumerate(qmem):
+                log(hex(offs+i*8), hex(data))
 
     m = Module()
     comb = m.d.comb
@@ -242,6 +248,7 @@ def run_tst(args, generator, qemu,
                 msg = "ld"
             if check_addr is not None:
                 sim_check_data(simulator, qemu, check_addr, msg)
+            sim_check_data(simulator, qemu, 0x600800, "dbgld")
             if _pc is None:
                 break
 
@@ -277,8 +284,8 @@ def help():
 def run_simulation():
 
     binaryname = None
-    initial_regs = [0]*32
-    initial_fprs = [0]*32
+    initial_regs = [0]*128
+    initial_fprs = [0]*128
     initial_sprs = None
     initial_mem = {}
     initial_pc = 0x0
@@ -309,9 +316,9 @@ def run_simulation():
         elif opt in ['-a', '--listing']:
             lst = arg
         elif opt in ['-g', '--intregs']:
-            initial_regs = read_entries(arg, 32)
+            initial_regs = read_entries(arg, 128)
         elif opt in ['-f', '--fpregs']:
-            initial_fprs = read_entries(arg, 32)
+            initial_fprs = read_entries(arg, 128)
         elif opt in ['-s', '--sprs']:
             initial_sprs = read_entries(arg, 32)
         elif opt in ['-l', '--load']: