no python files to be committed in isafunctions

[openpower-isa.git] / src / openpower / decoder / isa / remap_dct_yield.py

diff --git a/src/openpower/decoder/isa/remap_dct_yield.py b/src/openpower/decoder/isa/remap_dct_yield.py
index f46d9871b142e425cb18565b0e450b99b55663f2..c2758444646b8070def0c846e9744f15a44174f7 100644 (file)
--- a/src/openpower/decoder/isa/remap_dct_yield.py
+++ b/src/openpower/decoder/isa/remap_dct_yield.py
@@ -48,7 +48,8 @@ def iterate_dct_inner_halfswap_loadstore(SVSHAPE):
     # get indices to iterate over, in the required order
     n = SVSHAPE.lims[0]
     mode = SVSHAPE.lims[1]
-    print ("inner halfswap loadstore", n, mode, SVSHAPE.skip)
+    print ("inner halfswap loadstore", n, mode, SVSHAPE.skip,
+            "submode", SVSHAPE.submode2)
 
     # reference list for not needing to do data-swaps, just swap what
     # *indices* are referenced (two levels of indirection at the moment)
@@ -56,11 +57,16 @@ def iterate_dct_inner_halfswap_loadstore(SVSHAPE):
     ji = list(range(n))
 
     levels = n.bit_length() - 1
-    ji = halfrev2(ji, False)
-    if False: # swap: TODO, add extra bit-reverse mode
-        ri = [reverse_bits(i, levels) for i in range(n)]
-        ji = [ji[ri[i]] for i in range(n)]
+    ri = [reverse_bits(i, levels) for i in range(n)]
 
+    if SVSHAPE.mode == 0b01: # FFT, bitrev only
+        ji = [ji[ri[i]] for i in range(n)]
+    elif SVSHAPE.submode2 == 0b001:
+        ji = [ji[ri[i]] for i in range(n)]
+        ji = halfrev2(ji, True)
+    else:
+        ji = halfrev2(ji, False)
+        ji = [ji[ri[i]] for i in range(n)]
 
     # invert order if requested
     if SVSHAPE.invxyz[0]: