sort out subvl unit test with expected results

[openpower-isa.git] / src / openpower / decoder / isa / svstate.py

diff --git a/src/openpower/decoder/isa/svstate.py b/src/openpower/decoder/isa/svstate.py
index 68c2a8b2c9fea8ddd51fa6cd7e99afb573c568e4..9b8c89be9cbf5227dde3f208ed645e8020b2a05d 100644 (file)
--- a/src/openpower/decoder/isa/svstate.py
+++ b/src/openpower/decoder/isa/svstate.py
@@ -55,6 +55,22 @@ class SVP64State(SelectableInt):
     def srcstep(self, value):
         self.fsi['srcstep'].eq(value)
 
+    @property
+    def dsubstep(self):
+        return self.fsi['dsubstep'].asint(msb0=True)
+
+    @dsubstep.setter
+    def dsubstep(self, value):
+        self.fsi['dsubstep'].eq(value)
+
+    @property
+    def ssubstep(self):
+        return self.fsi['ssubstep'].asint(msb0=True)
+
+    @ssubstep.setter
+    def ssubstep(self, value):
+        self.fsi['ssubstep'].eq(value)
+
     @property
     def subvl(self):
         return self.fsi['subvl'].asint(msb0=True)