whoops, no ability to add comments in between functions in pseudocode
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_fp.py
index 004c265e22b202a4cb1159e02e94b36859ebb549..615ff5d5efda3b685487d3d603a2017b4d3bdbaf 100644 (file)
@@ -38,6 +38,21 @@ class DecoderTestCase(FHDLTestCase):
             print("FPR 1", sim.fpr(1))
             self.assertEqual(sim.fpr(1), SelectableInt(0x4040266660000000, 64))
 
+    def test_fpload2(self):
+        """>>> lst = ["lfsx 1, 0, 0",
+                     ]
+        """
+        lst = ["lfsx 1, 0, 0",
+                     ]
+        initial_mem = {0x0000: (0xac000000, 8),
+                       0x0020: (0x1828384822324252, 8),
+                        }
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_mem=initial_mem)
+            print("FPR 1", sim.fpr(1))
+            self.assertEqual(sim.fpr(1), SelectableInt(0xbd80000000000000, 64))
+
     def test_fp_single_ldst(self):
         """>>> lst = ["lfsx 1, 1, 0",   # load fp 1 from mem location 0
                       "stfsu 1, 16(1)", # store fp 1 into mem 0x10, update RA
@@ -178,6 +193,70 @@ class DecoderTestCase(FHDLTestCase):
             self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
             self.assertEqual(sim.fpr(3), SelectableInt(0xC006666666666668, 64))
 
+    def test_fp_muls(self):
+        """>>> lst = ["fmuls 3, 1, 2",
+                     ]
+        """
+        lst = ["fmuls 3, 1, 2", # 7.0 * -9.8 = -68.6
+               "fmuls 29,12,8", # test
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0x401C000000000000  # 7.0
+        fprs[2] = 0xC02399999999999A  # -9.8
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(1), SelectableInt(0x401C000000000000, 64))
+            self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
+            self.assertEqual(sim.fpr(3), SelectableInt(0xc051266640000000, 64))
+
+    def test_fp_muls3(self):
+        """>>> lst = ["fmuls 3, 1, 2",
+                     ]
+        """
+        lst = ["fmuls 3, 1, 2", #
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0xbfb0ab5100000000
+        fprs[2] = 0xbdca000000000000
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
+
+    def test_fp_muls4(self):
+        """>>> lst = ["fmuls 3, 1, 2",
+                     ]
+        """
+        lst = ["fmuls 3, 1, 2", #
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0xbe724e2000000000 # negative number
+        fprs[2] = 0x0                # times zero
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            # result should be -ve zero not +ve zero
+            self.assertEqual(sim.fpr(3), SelectableInt(0x8000000000000000, 64))
+
+    def test_fp_muls5(self):
+        """>>> lst = ["fmuls 3, 1, 2",
+                     ]
+        """
+        lst = ["fmuls 3, 1, 2", #
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0xbfb0ab5100000000
+        fprs[2] = 0xbdca000000000000
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
+
     def test_fp_mul(self):
         """>>> lst = ["fmul 3, 1, 2",
                      ]
@@ -195,6 +274,38 @@ class DecoderTestCase(FHDLTestCase):
             self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
             self.assertEqual(sim.fpr(3), SelectableInt(0xC051266666666667, 64))
 
+    def test_fp_madd1(self):
+        """>>> lst = ["fmadds 3, 1, 2, 4",
+                     ]
+        """
+        lst = ["fmadds 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -66.6
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0x401C000000000000  # 7.0
+        fprs[2] = 0xC02399999999999A  # -9.8
+        fprs[4] = 0x4000000000000000  # 2.0
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(3), SelectableInt(0xC050A66660000000, 64))
+
+    def test_fp_msub1(self):
+        """>>> lst = ["fmsubs 3, 1, 2, 4",
+                     ]
+        """
+        lst = ["fmsubs 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -70.6
+                     ]
+
+        fprs = [0] * 32
+        fprs[1] = 0x401C000000000000  # 7.0
+        fprs[2] = 0xC02399999999999A  # -9.8
+        fprs[4] = 0x4000000000000000  # 2.0
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            self.assertEqual(sim.fpr(3), SelectableInt(0xc051a66660000000, 64))
+
     def test_fp_fcfids(self):
         """>>> lst = ["fcfids 1, 2",
                lst = ["fcfids 3, 4",