add nayuki dct

[openpower-isa.git] / src / openpower / decoder / isa / test_caller_svp64_matrix.py

diff --git a/src/openpower/decoder/isa/test_caller_svp64_matrix.py b/src/openpower/decoder/isa/test_caller_svp64_matrix.py
index 7262e1cee66fa1d93fb7eb37f907d1cf88716d3a..6a37ce4db3c37a62ca8b1cad3aeaf6ee69428c9c 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_svp64_matrix.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_matrix.py
@@ -26,13 +26,15 @@ class DecoderTestCase(FHDLTestCase):
         for i in range(32):
             self.assertEqual(sim.gpr(i), SelectableInt(expected[i], 64))
 
-    def test_sv_remap(self):
-        """>>> lst = ["svremap 2, 2, 3, 0",
+    def test_sv_remap1(self):
+        """>>> lst = ["svshape 2, 2, 3, 0, 0",
+                        "svremap 31, 1, 2, 3, 0, 0, 0",
                        "sv.fmadds 0.v, 8.v, 16.v, 0.v"
                         ]
                 REMAP fmadds FRT, FRA, FRC, FRB
         """
-        lst = SVP64Asm(["svremap 2, 2, 3, 0",
+        lst = SVP64Asm(["svshape 2, 2, 3, 0, 0",
+                        "svremap 31, 1, 2, 3, 0, 0, 0",
                        "sv.fmadds 0.v, 16.v, 32.v, 0.v"
                         ])
         lst = list(lst)
@@ -63,8 +65,9 @@ class DecoderTestCase(FHDLTestCase):
 
         res = []
         # store FPs
-        for i, (x, y) in enumerate(zip(xf, yf)):
+        for i, x in enumerate(xf):
             fprs[i+16] = fp64toselectable(float(x))  # X matrix
+        for i, y in enumerate(yf):
             fprs[i+32] = fp64toselectable(float(y)) # Y matrix
             continue
             #t = DOUBLE2SINGLE(fp64toselectable(t)) # convert to Power single
@@ -73,15 +76,8 @@ class DecoderTestCase(FHDLTestCase):
             #print ("FFT", i, "in", a, b, "coeff", c, "mul",
             #       mul, "res", t, u)
 
-        # SVSTATE (in this case, VL=12, to cover all of matrix)
-        svstate = SVP64State()
-        svstate.vl[0:7] = 12 # VL
-        svstate.maxvl[0:7] = 12 # MAXVL
-        print ("SVSTATE", bin(svstate.spr.asint()))
-
         with Program(lst, bigendian=False) as program:
-            sim = self.run_tst_program(program, svstate=svstate,
-                                       initial_fprs=fprs)
+            sim = self.run_tst_program(program, initial_fprs=fprs)
             print ("spr svshape0", sim.spr['SVSHAPE0'])
             print ("    xdimsz", sim.spr['SVSHAPE0'].xdimsz)
             print ("    ydimsz", sim.spr['SVSHAPE0'].ydimsz)
@@ -96,6 +92,102 @@ class DecoderTestCase(FHDLTestCase):
             #    self.assertEqual(sim.fpr(i+2), t)
             #    self.assertEqual(sim.fpr(i+6), u)
 
+    def test_sv_remap2(self):
+        """>>> lst = ["svshape 5, 4, 3, 0, 0",
+                        "svremap 31, 1, 2, 3, 0, 0, 0, 0",
+                       "sv.fmadds 0.v, 8.v, 16.v, 0.v"
+                        ]
+                REMAP fmadds FRT, FRA, FRC, FRB
+        """
+        lst = SVP64Asm(["svshape 4, 3, 3, 0, 0",
+                        "svremap 31, 1, 2, 3, 0, 0, 0, 0",
+                       "sv.fmadds 0.v, 16.v, 32.v, 0.v"
+                        ])
+        lst = list(lst)
+
+        # 3x2 matrix
+        X1 = [[1, 2, 3],
+              [3, 4, 5],
+             ]
+        # 2x3 matrix
+        Y1 = [[6, 7],
+              [8, 9],
+              [10, 11],
+             ]
+
+        #### test matrices 2
+        # 3x3 matrix
+        X2 = [[12,7,3],
+            [4 ,5,6],
+            [7 ,8,9],
+            ]
+        # 3x4 matrix
+        Y2 = [[5,8,1,2],
+            [6,7,3,0],
+            [4,5,9,1]]
+
+        #### test matrices 3
+        # 3x4 matrix
+        X3 = [[12,7,3],
+            [4 ,5,6],
+            [7 ,8,9],
+            [2 ,0,1]]
+        # 3x5 matrix
+        Y3 = [[5,8,1,2,3],
+            [6,7,3,0,9],
+            [4,5,9,1,2]]
+
+        X = X2
+        Y = Y2
+
+        # get the dimensions of the 2 matrices
+        xdim1 = len(X[0])
+        ydim1 = len(X)
+        xdim2 = len(Y[0])
+        ydim2 = len(Y)
+
+        print ("xdim2 ydim1 ydim2", xdim2, ydim1, ydim2)
+
+        xf = reduce(operator.add, X)
+        yf = reduce(operator.add, Y)
+        print ("flattened X,Y")
+        print ("\t", xf)
+        print ("\t", yf)
+
+        # and create a linear result2, same scheme
+        #result1 = [0] * (ydim1*xdim2)
+
+
+        res = []
+        # store FPs
+        fprs = [0] * 64
+        for i, x in enumerate(xf):
+            fprs[i+16] = fp64toselectable(float(x))  # X matrix
+        for i, y in enumerate(yf):
+            fprs[i+32] = fp64toselectable(float(y)) # Y matrix
+            continue
+            #t = DOUBLE2SINGLE(fp64toselectable(t)) # convert to Power single
+            #u = DOUBLE2SINGLE(fp64toselectable(u)) # from double
+            #res.append((t, u))
+            #print ("FFT", i, "in", a, b, "coeff", c, "mul",
+            #       mul, "res", t, u)
+
+        with Program(lst, bigendian=False) as program:
+            sim = self.run_tst_program(program, initial_fprs=fprs)
+            print ("spr svshape0", sim.spr['SVSHAPE0'])
+            print ("    xdimsz", sim.spr['SVSHAPE0'].xdimsz)
+            print ("    ydimsz", sim.spr['SVSHAPE0'].ydimsz)
+            print ("    zdimsz", sim.spr['SVSHAPE0'].zdimsz)
+            print ("spr svshape1", sim.spr['SVSHAPE1'])
+            print ("spr svshape2", sim.spr['SVSHAPE2'])
+            print ("spr svshape3", sim.spr['SVSHAPE3'])
+            for i in range(16):
+                print ("i", i, float(sim.fpr(i)))
+            # confirm that the results are as expected
+            #for i, (t, u) in enumerate(res):
+            #    self.assertEqual(sim.fpr(i+2), t)
+            #    self.assertEqual(sim.fpr(i+6), u)
+
     def run_tst_program(self, prog, initial_regs=None,
                               svstate=None,
                               initial_mem=None,