whoops lsbshf=2 for CR5

[openpower-isa.git] / src / openpower / decoder / power_enums.py

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 9cbc82329b5df8addef8caec7f6c3a463cb1a84f..365ced69b20825c623ffc732d1f116e28d5851ea 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -176,7 +176,8 @@ class Form(Enum):
 
 class SVMode(Enum):
     NORMAL = auto()
-    LDST = auto()
+    LDST_IDX = auto()
+    LDST_IMM = auto()
     BRANCH = auto()
     CROP = auto()
 
@@ -191,6 +192,13 @@ class SVPtype(Enum):
     def _missing_(cls, value):
         return {"1P": SVPtype.P1, "2P": SVPtype.P2}[value]
 
+    def __repr__(self):
+        return {
+            SVPtype.NONE: "NONE",
+            SVPtype.P1: "1P",
+            SVPtype.P2: "2P",
+        }[self]
+
 
 @unique
 class SVEtype(Enum):
@@ -198,6 +206,9 @@ class SVEtype(Enum):
     EXTRA2 = 1
     EXTRA3 = 2
 
+    def __repr__(self):
+        return self.name
+
 
 @unique
 class SVExtra(Enum):
@@ -208,6 +219,16 @@ class SVExtra(Enum):
     Idx3 = 4
     Idx_1_2 = 5  # due to weird BA/BB for crops
 
+    def __repr__(self):
+        return {
+            SVExtra.NONE: "NONE",
+            SVExtra.Idx0: "[0]",
+            SVExtra.Idx1: "[1]",
+            SVExtra.Idx2: "[2]",
+            SVExtra.Idx3: "[3]",
+            SVExtra.Idx_1_2: "[1:2]",
+        }[self]
+
 # Backward compatibility
 SVEXTRA = SVExtra
 
@@ -372,11 +393,11 @@ class RegType(Enum):
     FRS = FPR
     FRT = FPR
 
-    CR_REG = 2
+    CR_REG = 2  # actually CR Field. the CR register is 32-bit.
     BF = CR_REG
     BFA = CR_REG
 
-    CR_BIT = 3
+    CR_BIT = 3 # refers to one bit of the 32-bit CR register
     BA = CR_BIT
     BB = CR_BIT
     BC = CR_BIT
@@ -462,7 +483,8 @@ _insns = [
     "setvl",  # https://libre-soc.org/openpower/sv/setvl
     "svindex",  # https://libre-soc.org/openpower/sv/remap
     "svremap",  # https://libre-soc.org/openpower/sv/remap - TEMPORARY
-    "svshape",  # https://libre-soc.org/openpower/sv/remap
+    "svshape",  # https://libre-soc.org/openpower/sv/remap/#svshape
+    "svshape2",  # https://libre-soc.org/openpower/sv/remap/discussion TODO
     "svstep",  # https://libre-soc.org/openpower/sv/setvl
     "sim_cfg",
     "slbia", "sld", "slw", "srad", "sradi",