whoops lsbshf=2 for CR5

[openpower-isa.git] / src / openpower / decoder / power_enums.py

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index cf08672a66cfcc354618ab053af65d4f98d9f958..365ced69b20825c623ffc732d1f116e28d5851ea 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -192,6 +192,13 @@ class SVPtype(Enum):
     def _missing_(cls, value):
         return {"1P": SVPtype.P1, "2P": SVPtype.P2}[value]
 
+    def __repr__(self):
+        return {
+            SVPtype.NONE: "NONE",
+            SVPtype.P1: "1P",
+            SVPtype.P2: "2P",
+        }[self]
+
 
 @unique
 class SVEtype(Enum):
@@ -199,6 +206,9 @@ class SVEtype(Enum):
     EXTRA2 = 1
     EXTRA3 = 2
 
+    def __repr__(self):
+        return self.name
+
 
 @unique
 class SVExtra(Enum):
@@ -383,11 +393,11 @@ class RegType(Enum):
     FRS = FPR
     FRT = FPR
 
-    CR_REG = 2
+    CR_REG = 2  # actually CR Field. the CR register is 32-bit.
     BF = CR_REG
     BFA = CR_REG
 
-    CR_BIT = 3
+    CR_BIT = 3 # refers to one bit of the 32-bit CR register
     BA = CR_BIT
     BB = CR_BIT
     BC = CR_BIT