power_enums: introduce RegType enum

[openpower-isa.git] / src / openpower / decoder / power_enums.py

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 0cd4aab04278de3b41fc92f6d3742b0c12789eb3..78015c362dea09d04358704034a7e4205260f0c1 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -22,6 +22,7 @@ import csv
 import os
 from os.path import dirname, join
 from collections import namedtuple
+import functools
 
 
 def find_wiki_dir():
@@ -109,6 +110,20 @@ class Function(Enum):
     VL = 1 << 13  # setvl
     FPU = 1 << 14  # FPU
 
+    @functools.lru_cache(maxsize=None)
+    def __repr__(self):
+        counter = 0
+        value = int(self.value)
+        if value != 0:
+            while value != 0:
+                counter += 1
+                value >>= 1
+            counter -= 1
+            desc = f"(1 << {counter})"
+        else:
+            desc = "0"
+        return f"<{self.__class__.__name__}.{self.name}: {desc}>"
+
 
 @unique
 class Form(Enum):
@@ -163,6 +178,10 @@ class SVPtype(Enum):
     P1 = 1
     P2 = 2
 
+    @classmethod
+    def _missing_(cls, value):
+        return {"1P": SVPtype.P1, "2P": SVPtype.P2}[value]
+
 
 @unique
 class SVEtype(Enum):
@@ -281,6 +300,34 @@ class SVP64LDSTmode(Enum):
     UNITSTRIDE = 3
 
 
+class RegType(Enum):
+    GPR = 0
+    RA = GPR
+    RB = GPR
+    RC = GPR
+    RS = GPR
+    RT = GPR
+
+    FPR = 1
+    FRA = FPR
+    FRB = FPR
+    FRC = FPR
+    FRS = FPR
+    FRT = FPR
+
+    CR_REG = 2
+    BF = CR_REG
+    BFA = CR_REG
+
+    CR_BIT = 3
+    BA = CR_BIT
+    BB = CR_BIT
+    BC = CR_BIT
+    BI = CR_BIT
+    BT = CR_BIT
+    BFT = CR_BIT
+
+
 # supported instructions: make sure to keep up-to-date with CSV files
 # just like everything else
 _insns = [