move ffadds to not conflict with fptrans -- makes space for min/max/fmod/remainder ops

[openpower-isa.git] / src / openpower / decoder / power_svp64.py

diff --git a/src/openpower/decoder/power_svp64.py b/src/openpower/decoder/power_svp64.py
index ea7f465c9d4f299151e2785b80ab4665f2d87fe9..47693727e1bd59d9ddb87e7995cc77357300832d 100644 (file)
--- a/src/openpower/decoder/power_svp64.py
+++ b/src/openpower/decoder/power_svp64.py
@@ -78,6 +78,7 @@ class SVP64RM:
         for fname in os.listdir(pth):
             if fname.startswith("RM") or fname.startswith("LDSTRM"):
                 for entry in get_csv(fname):
+                    entry['insn'] = entry['insn'].split("=")[-1]
                     if microwatt_format:
                         # move RS from position 1 to position 3, to match
                         # microwatt decode1.vhdl format
@@ -93,6 +94,8 @@ class SVP64RM:
 
         # now add the RM fields (for each instruction)
         for entry in v30b:
+            # FP entries have a format NN/NN=insn
+            entry['comment'] = entry['comment'].split("=")[-1]
             # *sigh* create extra field "out2" based on LD/ST update
             # KEEP TRACK HERE https://bugs.libre-soc.org/show_bug.cgi?id=619
             entry['out2'] = 'NONE'