CROpFF3RM and CROpFF5RM were swapped round.

[openpower-isa.git] / src / openpower / sv / trans / test_pysvp64dis.py

diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py
index e548a304aeb3c87dec96070f8ed36962883c15df..273abaff07dc32844a7f163528f0623b327d2abe 100644 (file)
--- a/src/openpower/sv/trans/test_pysvp64dis.py
+++ b/src/openpower/sv/trans/test_pysvp64dis.py
@@ -315,12 +315,12 @@ class SVSTATETestCase(unittest.TestCase):
     def test_20_cmp(self):
         expected = [
                     "sv.cmp *4,1,*0,1",
-                    "sv.cmp/ff=RC1 *4,1,*0,1",
-                    "sv.cmp/ff=RC1/vli *4,1,*0,1",
-                    "sv.cmp/ff=~RC1 *4,1,*0,1",
-                    "sv.cmp/ff=RC1/m=r3/sz *4,1,*0,1",
-                    "sv.cmp/dz/ff=RC1/m=r3 *4,1,*0,1",
-                    "sv.cmp/dz/ff=RC1/m=r3/sz *4,1,*0,1",
+                    "sv.cmp/ff=eq *4,1,*0,1",
+                    "sv.cmp/ff=eq/vli *4,1,*0,1",
+                    "sv.cmp/ff=ne *4,1,*0,1",
+                    "sv.cmp/ff=eq/m=r3/sz *4,1,*0,1",
+                    "sv.cmp/dz/ff=lt/m=r3 *4,1,*0,1",
+                    "sv.cmp/dz/ff=gt/m=r3/sz *4,1,*0,1",
                         ]
         self._do_tst(expected)