add sv.bc/ctr/vsb unit test to test_pysvp64dis.py to show it is possible

[openpower-isa.git] / src / openpower / sv / trans / test_pysvp64dis.py

diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py
index 8fbd0203bdb187c404ec7e20bc3c2335556defe6..98173ba566b6f2e475d36c2a2a2186af095bf8a6 100644 (file)
--- a/src/openpower/sv/trans/test_pysvp64dis.py
+++ b/src/openpower/sv/trans/test_pysvp64dis.py
@@ -248,6 +248,31 @@ class SVSTATETestCase(unittest.TestCase):
                         ]
         self._do_tst(expected)
 
+    def test_15_els(self):
+        expected = [
+                    "sv.stw/els *4,16(2)",
+                    "sv.lfs/els *1,256(4)",
+                        ]
+        self._do_tst(expected)
+
+    def test_16_bc(self):
+        # hilarious. this should be autogenerated from a sequence
+        # of lists of options. it's a lot of frickin options.
+        expected = [
+                    "sv.bc/all 12,*1,0xc",
+                    "sv.bc/snz 12,*1,0xc",
+                    "sv.bc/all/sl/slu 12,*1,0xc",
+                    "sv.bc/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/vs/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/vsi/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/vsb/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/vsbi/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/ctr/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/cti/all/snz/sl/slu/lru 12,*1,0xc",
+                    "sv.bc/vsb/ctr/all/snz/sl/slu/lru 12,*1,0xc",
+                        ]
+        self._do_tst(expected)
+
 if __name__ == "__main__":
     unittest.main()