fix dsld pseudocode to use ROTL64 instead of ROTL128

[openpower-isa.git] / src / openpower / test / bigint / bigint_cases.py

diff --git a/src/openpower/test/bigint/bigint_cases.py b/src/openpower/test/bigint/bigint_cases.py
index 665f30b04a00a529494c903117786ce37cb02f3f..9abdce5590b15e83ad4f47b8a94819e2b5051225 100644 (file)
--- a/src/openpower/test/bigint/bigint_cases.py
+++ b/src/openpower/test/bigint/bigint_cases.py
@@ -173,7 +173,6 @@ class SVP64BigIntCases(TestAccumulatorBase):
         svstate.vl = 3
         svstate.maxvl = 3
         e = ExpectedState(pc=8, int_regs=gprs)
-        e.intregs[5] = 0x0000_0000_0000_0000     # it's down the other end...
         self.add_case(prog, gprs, expected=e, initial_svstate=svstate)
 
     def case_sv_bigint_mul_by_scalar(self):