add absolute-difference DRAFT

[openpower-isa.git] / src / openpower / test / bitmanip / av_cases.py

diff --git a/src/openpower/test/bitmanip/av_cases.py b/src/openpower/test/bitmanip/av_cases.py
index 5fabe7651379dafc2a17857e1db78fa385ff5882..b66928509725b308e51c26838ee8d701bf770905 100644 (file)
--- a/src/openpower/test/bitmanip/av_cases.py
+++ b/src/openpower/test/bitmanip/av_cases.py
@@ -221,3 +221,42 @@ class AVTestCase(TestAccumulatorBase):
         e.intregs[3] = 0xffffffffffffffff
         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 
+    def case_0_absdu(self):
+        lst = ["absdu 3, 1, 2"]
+        lst = list(SVP64Asm(lst, bigendian))
+
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x1
+        initial_regs[2] = 0x2
+        e = ExpectedState(pc=4)
+        e.intregs[1] = 0x1
+        e.intregs[2] = 0x2
+        e.intregs[3] = 0x1
+        self.add_case(Program(lst, bigendian), initial_regs, expected=e)
+
+    def case_1_absdu(self):
+        lst = ["absdu 3, 1, 2"]
+        lst = list(SVP64Asm(lst, bigendian))
+
+        initial_regs = [0] * 32
+        initial_regs[1] = 0xffffffffffffffff
+        initial_regs[2] = 0x2
+        e = ExpectedState(pc=4)
+        e.intregs[1] = 0xffffffffffffffff
+        e.intregs[2] = 0x2
+        e.intregs[3] = 0x3
+        self.add_case(Program(lst, bigendian), initial_regs, expected=e)
+
+    def case_2_absdu(self):
+        lst = ["absdu 3, 1, 2"]
+        lst = list(SVP64Asm(lst, bigendian))
+
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x2
+        initial_regs[2] = 0xffffffffffffffff
+        e = ExpectedState(pc=4)
+        e.intregs[1] = 0x2
+        e.intregs[2] = 0xffffffffffffffff
+        e.intregs[3] = 0x3
+        self.add_case(Program(lst, bigendian), initial_regs, expected=e)
+