add sv.divmod2du test, inverse of the sv.madded

[openpower-isa.git] / src / openpower / test / common.py

diff --git a/src/openpower/test/common.py b/src/openpower/test/common.py
index 2bc0c1fab494720f388b24e2be598883381c535c..d9a846d24de74ede5ddfa2b999fe949b80f851fe 100644 (file)
--- a/src/openpower/test/common.py
+++ b/src/openpower/test/common.py
@@ -3,12 +3,15 @@ Bugreports:
 * https://bugs.libre-soc.org/show_bug.cgi?id=361
 """
 
+from contextlib import contextmanager
 import inspect
 import functools
 import types
+import os
 
 from openpower.decoder.power_enums import XER_bits, CryIn, spr_dict
-from openpower.util import fast_reg_to_spr, slow_reg_to_spr  # HACK!
+from openpower.util import LogKind, log, \
+    fast_reg_to_spr, slow_reg_to_spr  # HACK!
 from openpower.consts import XERRegsEnum
 
 
@@ -83,8 +86,11 @@ def skip_case_if(condition, reason):
 
 
 class TestAccumulatorBase:
+    __test__ = False  # pytest should ignore this class
 
     def __init__(self):
+        self.__subtest_args = {}
+
         self.test_data = []
         # automatically identifies anything starting with "case_" and
         # runs it.  very similar to unittest auto-identification except
@@ -97,29 +103,59 @@ class TestAccumulatorBase:
                     # TODO(programmerjake): translate to final test sending
                     # skip signal to unittest. for now, just print the skipped
                     # reason and ignore
-                    print(f"SKIPPED({n}):", str(e))
+                    log(f"SKIPPED({n}):", str(e), kind=LogKind.SkipCase)
+
+    @contextmanager
+    def subTest(self, **kwargs):
+        old_subtest_args = self.__subtest_args
+        try:
+            self.__subtest_args = old_subtest_args.copy()
+            self.__subtest_args.update(**kwargs)
+            yield
+        finally:
+            self.__subtest_args = old_subtest_args
 
     def add_case(self, prog, initial_regs=None, initial_sprs=None,
                  initial_cr=0, initial_msr=0,
                  initial_mem=None,
-                 initial_svstate=0):
-
-        test_name = inspect.stack()[1][3]  # name of caller of this function
+                 initial_svstate=0,
+                 expected=None,
+                 stop_at_pc=None,
+                 fpregs=None,
+                 src_loc_at=0):
+
+        # name of caller of this function
+        test_name = inspect.stack()[1 + src_loc_at][3]
+        # name of file containing test case
+        test_file = os.path.splitext(os.path.basename(
+                                    inspect.stack()[1][1]))[0]
         tc = TestCase(prog, test_name,
                       regs=initial_regs, sprs=initial_sprs, cr=initial_cr,
                       msr=initial_msr,
                       mem=initial_mem,
-                      svstate=initial_svstate)
+                      svstate=initial_svstate,
+                      expected=expected,
+                      stop_at_pc=stop_at_pc,
+                      test_file=test_file,
+                      subtest_args=self.__subtest_args.copy(),
+                      fpregs=fpregs)
 
         self.test_data.append(tc)
 
 
 class TestCase:
+    __test__ = False  # pytest should ignore this class
+
     def __init__(self, program, name, regs=None, sprs=None, cr=0, mem=None,
                  msr=0,
                  do_sim=True,
                  extra_break_addr=None,
-                 svstate=0):
+                 svstate=0,
+                 expected=None,
+                 stop_at_pc=None,
+                 test_file=None,
+                 subtest_args=None,
+                 fpregs=None):
 
         self.program = program
         self.name = name
@@ -130,7 +166,10 @@ class TestCase:
             sprs = {}
         if mem is None:
             mem = {}
+        if fpregs is None:
+            fpregs = [0] * 32
         self.regs = regs
+        self.fpregs = fpregs
         self.sprs = sprs
         self.cr = cr
         self.mem = mem
@@ -138,6 +177,10 @@ class TestCase:
         self.do_sim = do_sim
         self.extra_break_addr = extra_break_addr
         self.svstate = svstate
+        self.expected = expected # expected results from the test
+        self.stop_at_pc = stop_at_pc # hard-stop address (do not attempt to run)
+        self.test_file = test_file
+        self.subtest_args = {} if subtest_args is None else dict(subtest_args)
 
 
 class ALUHelpers: