new axi addr map class

[pinmux.git] / src / spec / pinfunctions.py

diff --git a/src/spec/pinfunctions.py b/src/spec/pinfunctions.py
index 423a190159dc462d499a8bcfb3f7ce138c977fc7..cdfaab49aa77b4fe5d4aaaa4d79d283288a113e7 100644 (file)
--- a/src/spec/pinfunctions.py
+++ b/src/spec/pinfunctions.py
@@ -37,8 +37,8 @@
     sdmmc is never going to do anything other than switch this entire
     bank all at once.  so in this particular example, sdmmc returns:
 
-        (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
-         ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
+    (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
+     ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
 """
 
 
@@ -164,33 +164,45 @@ def flexbus2(suffix, bank):
 def sdram1(suffix, bank):
     buspins = []
     inout = []
-    for i in range(16):
-        pname = "SDRDQM%d*" % i
+    for i in range(8):
+        pname = "SDRDQM%d+" % i
+        buspins.append(pname)
+    for i in range(8):
+        pname = "SDRD%d*" % i
         buspins.append(pname)
         inout.append(pname)
     for i in range(12):
         buspins.append("SDRAD%d+" % i)
-    for i in range(8):
-        buspins.append("SDRDQ%d+" % i)
-    for i in range(3):
-        buspins.append("SDRCS%d#+" % i)
-    for i in range(2):
-        buspins.append("SDRDQ%d+" % i)
     for i in range(2):
         buspins.append("SDRBA%d+" % i)
-    buspins += ['SDRCKE+', 'SDRRAS#+', 'SDRCAS#+', 'SDRWE#+',
-                'SDRRST+']
+    buspins += ['SDRCLK+', 'SDRCKE+', 'SDRRASn+', 'SDRCASn+', 'SDRWEn+',
+                'SDRCSn0+']
     return (buspins, inout)
 
 
 def sdram2(suffix, bank):
     buspins = []
     inout = []
-    for i in range(3, 6):
-        buspins.append("SDRCS%d#+" % i)
-    for i in range(16, 32):
+    for i in range(1, 6):
+        buspins.append("SDRCSn%d+" % i)
+    for i in range(8, 16):
         pname = "SDRDQM%d*" % i
         buspins.append(pname)
+    for i in range(8, 16):
+        pname = "SDRD%d*" % i
+        buspins.append(pname)
+        inout.append(pname)
+    return (buspins, inout)
+
+
+def sdram3(suffix, bank):
+    buspins = []
+    inout = []
+    for i in range(12, 13):
+        buspins.append("SDRAD%d+" % i)
+    for i in range(8, 64):
+        pname = "SDRD%d*" % i
+        buspins.append(pname)
         inout.append(pname)
     return (buspins, inout)
 
@@ -240,8 +252,8 @@ def gpio(suffix, bank):
 # list functions by name here
 
 pinspec = (('IIS', i2s),
-           ('MMC', emmc),
-           ('SD', sdmmc),
+           ('EMMC', emmc),
+           ('MMC', sdmmc),
            ('MSPI', mspi),
            ('MQSPI', mquadspi),
            ('SPI', spi),
@@ -257,6 +269,7 @@ pinspec = (('IIS', i2s),
            ('FB', flexbus2),
            ('SDR', sdram1),
            ('SDR', sdram2),
+           ('SDR', sdram3),
            ('EINT', eint),
            ('PWM', pwm),
            ('GPIO', gpio),