// Each IO cell will have 8 input field (output from pin mux
// and on output field (input to pinmux)
// interface declaration between IO-0 and pinmux
- (*always_ready*) method GenericIOType io0_cell;
+ (*always_ready,always_enabled*) method Bit#(1) io0_cell_outen;
+ (*always_ready,always_enabled*) method Bit#(1) io0_cell_out;
(*always_ready,always_enabled,result="io"*) method
Action io0_inputval (Bit#(1) in);
// interface declaration between IO-1 and pinmux
- (*always_ready*) method GenericIOType io1_cell;
+ (*always_ready,always_enabled*) method Bit#(1) io1_cell_outen;
+ (*always_ready,always_enabled*) method Bit#(1) io1_cell_out;
(*always_ready,always_enabled,result="io"*) method
Action io1_inputval (Bit#(1) in);
// interface declaration between IO-2 and pinmux
- (*always_ready*) method GenericIOType io2_cell;
+ (*always_ready,always_enabled*) method Bit#(1) io2_cell_outen;
+ (*always_ready,always_enabled*) method Bit#(1) io2_cell_out;
(*always_ready,always_enabled,result="io"*) method
Action io2_inputval (Bit#(1) in);
// interface declaration between UART-0 and pinmux
Wire#(Bit#(1)) wrcell2_mux<-mkDWire(0);
// following wires capture signals to IO CELL if io-0 is
// allotted to it
- GenericIOType cell0_mux_out=unpack(0);
+ Wire#(Bit#(1)) cell0_mux_out<-mkDWire(0);
+ Wire#(Bit#(1)) cell0_mux_outen<-mkDWire(0);
Wire#(Bit#(1)) cell0_mux_in<-mkDWire(0);
// following wires capture signals to IO CELL if io-1 is
// allotted to it
- GenericIOType cell1_mux_out=unpack(0);
+ Wire#(Bit#(1)) cell1_mux_out<-mkDWire(0);
+ Wire#(Bit#(1)) cell1_mux_outen<-mkDWire(0);
Wire#(Bit#(1)) cell1_mux_in<-mkDWire(0);
// following wires capture signals to IO CELL if io-2 is
// allotted to it
- GenericIOType cell2_mux_out=unpack(0);
+ Wire#(Bit#(1)) cell2_mux_out<-mkDWire(0);
+ Wire#(Bit#(1)) cell2_mux_outen<-mkDWire(0);
Wire#(Bit#(1)) cell2_mux_in<-mkDWire(0);
// following wires capture signals to IO CELL if uart-0 is
// allotted to it
+ // declare wruart_tx_*, set up as type 'out'
Wire#(Bit#(1)) wruart_tx<-mkDWire(0);
+ // declare wruart_rx_*, set up as type 'input'
Wire#(Bit#(1)) wruart_rx<-mkDWire(0);
- # declare uart_tx_io, set up as type 'out'
- GenericIOType uart_tx_io = GenericIOType{
- outputval:wruart_tx,
- output_en:1,
- input_en:0,
- };
- # declare uart_rx_io, set up as type 'input'
- GenericIOType uart_rx_io = GenericIOType{
- outputval:0,
- output_en:0,
- input_en:1,
- };
// following wires capture signals to IO CELL if gpioa-0 is
// allotted to it
Wire#(Bit#(1)) wrgpioa_a2_out<-mkDWire(0);
Wire#(Bit#(1)) wrgpioa_a2_outen<-mkDWire(0);
Wire#(Bit#(1)) wrgpioa_a2_in<-mkDWire(0);
- # declare gpioa_a0_io, set up as type 'inout'
- GenericIOType gpioa_a0_io = GenericIOType{
- outputval:wrgpioa_a0_out,
- output_en:wrgpioa_a0_outen,
- input_en:~wrgpioa_a0_outen,
- };
- # declare gpioa_a1_io, set up as type 'inout'
- GenericIOType gpioa_a1_io = GenericIOType{
- outputval:wrgpioa_a1_out,
- output_en:wrgpioa_a1_outen,
- input_en:~wrgpioa_a1_outen,
- };
- # declare gpioa_a2_io, set up as type 'inout'
- GenericIOType gpioa_a2_io = GenericIOType{
- outputval:wrgpioa_a2_out,
- output_en:wrgpioa_a2_outen,
- input_en:~wrgpioa_a2_outen,
- };
// following wires capture signals to IO CELL if twi-0 is
// allotted to it
+ // declare wrtwi_sda_*, set up as type 'inout'
Wire#(Bit#(1)) wrtwi_sda_out<-mkDWire(0);
Wire#(Bit#(1)) wrtwi_sda_outen<-mkDWire(0);
Wire#(Bit#(1)) wrtwi_sda_in<-mkDWire(0);
+ // declare wrtwi_scl_io*, set up as type 'inout'
Wire#(Bit#(1)) wrtwi_scl_out<-mkDWire(0);
Wire#(Bit#(1)) wrtwi_scl_outen<-mkDWire(0);
Wire#(Bit#(1)) wrtwi_scl_in<-mkDWire(0);
- # declare twi_sda_io, set up as type 'inout'
- GenericIOType twi_sda_io = GenericIOType{
- outputval:wrtwi_sda_out,
- output_en:wrtwi_sda_outen,
- input_en:~wrtwi_sda_outen,
- };
- # declare twi_scl_io, set up as type 'inout'
- GenericIOType twi_scl_io = GenericIOType{
- outputval:wrtwi_scl_out,
- output_en:wrtwi_scl_outen,
- input_en:~wrtwi_scl_outen,
- };
/*====== This where the muxing starts for each io-cell======*/
+ // TODO: this needs to stop using GenericIOType and
+ // set the output (and only the output) as a wire
// output muxer for cell idx 0
- cell0_mux_out=wrcell0_mux==0?gpioa_a0_io:
+ cell0_mux_out=wrcell0_mux==0?gpioa_a0_io_out:
wrcell0_mux==1?uart0_tx_io:
0;
+ // TODO: here is needed something which sets a new
+ // wire, cell0_mux_outen
+ cell0_mux_outen=
+ wrcell0_mux==0?gpioa_a0_io.output_en: // gpio bi-directional
+ wrcell0_mux==1?gpioa_a0_io.output_en: // i think....
+ 0; // not sure.... 3rd entry is blank... might as well be 0
+
rule assign_wrgpioa_a0_in_on_cell0(wrcell0_mux==0);
wrgpioa_a0_in<=cell0_mux_in;
endrule
+ // TODO: this needs to stop using GenericIOType and
+ // set the output (and only the output) as a wire
// output muxer for cell idx 1
cell1_mux_out=wrcell1_mux==0?gpioa_a1_io:
- wrcell1_mux==1?uart0_rx_io:
+ wrcell1_mux==1?uart0_rx_io: // oink?? this is an input!!
twi0_sda_io;
+ // TODO: here is needed something which sets a new
+ // wire, cell1_mux_outen
+ cell1_mux_outen=
+ wrcell1_mux==0?gpioa_a1_io.output_en: // gpio bi-directional
+ wrcell1_mux==1?uart0_rx_io: // oink?? this is an input!!
+ twi0_sda_io.output_en; // this one's bi-directional
+
rule assign_wrgpioa_a1_in_on_cell1(wrcell1_mux==0);
wrgpioa_a1_in<=cell1_mux_in;
endrule
wrtwi0_sda_in<=cell1_mux_in;
endrule
+ // TODO: this needs to stop using GenericIOType and
+ // set the output (and only the output) as a wire
// output muxer for cell idx 2
- cell2_mux_out=wrcell2_mux==0?gpioa_a2_io:
+ cell2_mux_out=
+ wrcell2_mux==0?gpioa_a2_io:
wrcell2_mux==1?0:
twi0_scl_io;
+ // TODO: here is needed something which sets a new
+ // wire, cell2_mux_outen
+ cell2_mux_outen=
+ wrcell2_mux==0?gpioa_a2_io.output_en:
+ wrcell2_mux==1?0:
+ twi0_scl_io.output_en;
+
+
rule assign_wrgpioa_a2_in_on_cell2(wrcell2_mux==0);
wrgpioa_a2_in<=cell2_mux_in;
endrule
endinterface;
interface peripheral_side = interface PeripheralSide
- method io0_cell=cell0_mux_out;
+ method io0_cell_out=cell0_mux_out;
+ method io0_cell_outen=cell0_mux_outen;
method Action io0_inputval(Bit#(1) in);
cell0_mux_in<=in;
endmethod
- method io1_cell=cell1_mux_out;
+ method io1_cell_out=cell1_mux_out;
+ method io1_cell_outen=cell1_mux_outen;
method Action io1_inputval(Bit#(1) in);
cell1_mux_in<=in;
endmethod
- method io2_cell=cell2_mux_out;
+ method io2_cell_out=cell2_mux_out;
+ method io2_cell_outen=cell2_mux_outen;
method Action io2_inputval(Bit#(1) in);
cell2_mux_in<=in;
endmethod
projects / pinmux.git / blobdiff